Ceramic capacitor
A ceramic capacitor of the present invention comprises: a ceramic body 100 in which a plurality of first dielectric layers 110 are stacked; and first and second bottom electrodes 211 and 212 arranged on both sides of the bottom surface of the ceramic body 100 , wherein the plurality of first dielectric layers 110 are formed of only dielectric. The present invention has an advantage of providing a multilayer ceramic capacitor having a low capacity structure to have a high reaction speed while operating at a high frequency.
1 . A ceramic capacitor assembly comprising:
a substrate having a circuit pattern; and
a ceramic capacitor mounted on the substrate,
the ceramic capacitor comprising:
a ceramic body in which a plurality of first dielectric layers are stacked; and
first and second bottom electrodes disposed on both sides of a lower surface of the ceramic body,
wherein the ceramic body further comprises a second dielectric layer on which a float electrode is disposed,
wherein the float electrode is disposed on a central part in a length direction of the second dielectric layer, is spaced apart from both side surfaces of the second dielectric layer, and both ends of the float electrode overlap parts of the first and second bottom electrodes,
wherein the float electrode forms a capacitance with each of the first and second bottom electrodes,
wherein the ceramic body comprises a plurality of dummy electrodes disposed on and above the second dielectric layer and exposed to both side surfaces of the ceramic body,
wherein an interval between the first and second bottom electrodes and the dummy electrode located at a lowermost part or an interval between the dummy electrodes is an interval at which a solder is able to rise along the dummy electrode during soldering of the first and second bottom electrodes onto the substrate, and
wherein the solder is disposed in contact with the dummy electrodes exposed to the both side surfaces of the ceramic body and the circuit pattern of the substrate, and rises along the dummy electrodes.
2 . The ceramic capacitor assembly of claim 1 , wherein the ceramic body further comprises a plurality of third dielectric layers on which the dummy electrodes are disposed, and
wherein the dummy electrodes are exposed to both side surfaces of the ceramic body.
3 . The ceramic capacitor assembly of claim 1 , wherein an interval in a height direction between the dummy electrodes is 2 μm to 3 μm.
4 . The ceramic capacitor assembly of claim 1 , wherein the ceramic body further comprises a third dielectric layer, and
wherein the dummy electrodes are formed on both sides of at least one of upper surfaces and lower surfaces of the second dielectric layer and the third dielectric layer, are exposed to both side surfaces thereof, and are shaped to face each other.
5 . The ceramic capacitor assembly of claim 1 , wherein the dummy electrode is formed in one of a straight shape, a “⊏” shape, and a “T” shape.
6 . The ceramic capacitor assembly of claim 1 , wherein the dummy electrodes parts exposed to the both side surfaces of the ceramic body and the first and second bottom electrodes are connected by plating.
7 . The ceramic capacitor assembly of claim 1 , wherein a distance between the dummy electrode located at an uppermost part among the dummy electrodes and the bottom electrode is equal to or less than a half of a height of the ceramic body.