Microelectronic device package with integral slotted waveguide antenna
An example microelectronic device package includes: a multilayer package substrate including a slotted waveguide antenna and having routing conductors, the multilayer package substrate having a device side surface and an opposing board side surface; a semiconductor die mounted to the device side surface of the multilayer package substrate and coupled to slotted waveguide antenna by the routing conductors; and mold compound covering the semiconductor die, and a portion of the multilayer package substrate.
1 . A microelectronic device package, comprising:
a multilayer package substrate comprising a slotted waveguide antenna and routing conductors, the multilayer package substrate having a device side surface and an opposing board side surface;
a semiconductor die mounted to the device side surface of the multilayer package substrate and coupled to the slotted waveguide antenna by the routing conductors; and
mold compound covering the semiconductor die, and a portion of the multilayer package substrate.
2 . The microelectronic device package of claim 1 , wherein the semiconductor die comprises a radio frequency transceiver device.
3 . The microelectronic device package of claim 1 , wherein the slotted waveguide antenna comprises a rectangular waveguide having a first side, a second side opposite the first side, a board side surface normal to the first side and to the second side and parallel to the board side surface of the multilayer package substrate, and a device side surface opposite the board side surface and parallel to the device side surface of the multilayer package substrate;
dielectric material formed within the rectangular waveguide; and
slots formed in the device side surface of the rectangular waveguide configured to radiate radio frequency energy.
4 . The microelectronic device package of claim 3 , wherein the multilayer package substrate comprises trace level conductor layers spaced by the dielectric material between the trace level conductor layers, and connection level conductors between the trace level conductor layers and extending through the dielectric material.
5 . The microelectronic device package of claim 4 , wherein the dielectric material comprises Ajinomoto build-up film (ABF).
6 . The microelectronic device package of claim 4 , wherein the dielectric material comprises Ajinomoto build-up film (ABF), acrylonitrile butadiene styrene (ABS), acrylonitrile styrene acrylate (ASA), or resin epoxy.
7 . The microelectronic device package of claim 4 , wherein the first side, the second side, the board side surface, and the device side surface of the rectangular waveguide are formed of the trace level conductor layers and the connection level conductors of the multilayer package substrate.
8 . The microelectronic device package of claim 4 , wherein the trace level conductor layers in the multilayer package substrate are of copper, gold, aluminum, silver, or an alloy thereof.
9 . The microelectronic device package of claim 3 , wherein the dielectric material is Ajinomoto build-up film (ABF).
10 . The microelectronic device package of claim 3 , wherein the dielectric material is Ajinomoto build-up film (ABF), acrylonitrile butadiene styrene (ABS), acrylonitrile styrene acrylate (ASA), or epoxy resin.
11 . The microelectronic device package of claim 1 , wherein the slotted waveguide antenna is a first slotted waveguide antenna, and further comprising additional slotted waveguide antennas formed in the multilayer package substrate.
12 . The microelectronic device package of claim 1 , wherein the slotted waveguide antenna is configured to radiate at a radio frequency between 30 GHz and 300 GHz.
13 . The microelectronic device package of claim 12 , wherein the slotted waveguide antenna is configured to radiate at a radio frequency between 207 GHz and 211 GHz.
14 . The microelectronic device package of claim 13 , wherein the slotted waveguide antenna is configured to radiate at a radio frequency of approximately 210 GHz.
15 . The microelectronic device package of claim 1 , wherein the semiconductor die is flip chip mounted to the device side surface of the multilayer package substrate, the semiconductor die having conductive post connects extending from bond pads on the semiconductor die and extending to distal ends away from the semiconductor die, and having solder bumps on the distal ends of the conductive post connects, the solder bumps forming bonds to the multilayer package substrate.
16 . The microelectronic device package of claim 1 , further comprising terminals formed on the board side surface of the multilayer package substrate, the terminals forming electrical connections for the microelectronic device package including the semiconductor die and the slotted waveguide antenna.
17 . The microelectronic device package of claim 1 , wherein the microelectronic device package further comprises a quad flat no-lead (QFN) microelectronic device package.
18 . An apparatus, comprising:
a multilayer package substrate comprising an array of slotted waveguide antennas positioned side by side and routing conductors, the multilayer package substrate having a device side surface and an opposite board side surface;
a semiconductor die mounted to the device side surface of the multilayer package substrate and coupled to the array of slotted waveguide antennas by the routing conductors; and
a cover covering the semiconductor die, and a portion of the multilayer package substrate.
19 . The apparatus of claim 18 , wherein one of the array of slotted waveguide antennas comprises:
a rectangular waveguide having a first side, a second side opposite the first side, a board side surface normal to the first side and to the second side and parallel to the board side surface of the multilayer package substrate, and a device side surface opposite the board side surface and parallel to the device side surface of the multilayer package substrate;
dielectric material within the rectangular waveguide; and
slots formed in the device side surface of the rectangular waveguide to form the one of the array of slotted waveguide antennas.
20 . A method, comprising:
forming a multilayer package substrate comprising a slotted waveguide antenna and routing conductors in trace level conductors of the multilayer package substrate;
mounting a semiconductor die over a device side surface of the multilayer package substrate, the semiconductor die coupled to the slotted waveguide antenna by the routing conductors; and
covering the semiconductor die and a portion of the multilayer package substrate with mold compound to form a microelectronic device package.
21 . The method of claim 20 , wherein forming the multilayer package substrate comprising the slotted waveguide antenna comprises:
patterning first trace level conductors over a carrier;
patterning first connection level conductors over the first trace level conductors;
depositing a dielectric layer over the first connection level conductors and the first trace level conductors;
grinding the dielectric layer to expose the first connection level conductors;
patterning additional trace level conductors, additional connection level conductors, and additional dielectric layers formed over the first connection level conductors to form the multilayer package substrate;
forming a rectangular waveguide in the multilayer package substrate using portions of the trace level conductors to form a board side surface and a device side surface opposite the board side surface, using the connection level conductors to form a first side and a second opposing side between the board side surface and the device side surface and normal to the board side surface, the rectangular waveguide filled with the dielectric layers; and
forming slots in the device side surface of the rectangular waveguide configured to radiate radio frequency energy.
22 . The method of claim 21 , wherein the dielectric layers comprise Ajinomoto build-up film (ABF), acrylonitrile butadiene styrene (ABS), acrylonitrile styrene acrylate (ASA), or epoxy resin.
23 . The method of claim 21 , wherein patterning the first trace level conductors and the first connection level conductors comprises plating copper or an alloy.
24 . The method of claim 20 , wherein the slotted waveguide antenna is a first slotted waveguide antenna, and further comprising forming additional slotted waveguide antennas in the multilayer package substrate.
25 . The method of claim 20 , wherein the slotted waveguide antenna is tuned to a frequency of between 140 GHz and 220 GHz.
26 . The method of claim 20 , further comprising forming a coplanar waveguide or a microstrip using the routing conductors, and coupling the semiconductor die to the slotted waveguide antenna using the coplanar waveguide or the microstrip.