IP Library Granted Patent US 12695377
Granted Patent B2
US 12695377 · App. 18/427,937 · Granted Jul 28, 2026

Switching converter deadtime control

Inventors: Hua Tang (Shenzhen, CN); Xuemei Lu (ChongQing, CN); Zhaofu Zhou (ChongQing, CN); Pengcheng Ban (Guangzhou, CN); Yubo Wang (Shenzhen, CN)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H02M1/385H02M3/33592
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12695377
App. No.
18/427,937
Granted
Jul 28, 2026
Kind
B2
Abstract

A circuit includes a controller configured to control switching of a first transistor and a second transistor in switching converter. The controller includes a compensation loop and a deadtime circuit. The compensation loop is configured to provide a compensation value. The deadtime circuit is configured to determine a deadtime value based on the compensation value. The deadtime value defines an interval between turn-off of the first transistor and turn-on of the second transistor.

Claims (33)

1 . A circuit comprising:

a controller configured to control switching of a first transistor and a second transistor in a switching converter, the controller including:

a compensation loop including a voltage loop filter configured to provide a compensation value based on an output voltage of the switching converter; and

a deadtime circuit configured to determine a deadtime value based on the compensation value, the deadtime value defining an interval between turn-off of the first transistor and turn-on of the second transistor.

2 . The circuit of claim 1 , wherein the deadtime circuit includes a lookup table storing the deadtime value, and the deadtime circuit is configured to retrieve the deadtime value from the lookup table based on the compensation value.

3 . The circuit of claim 2 , wherein the deadtime circuit includes a shifter circuit configured to right-shift the compensation value by a selected number of bits to produce a shifted compensation value.

4 . The circuit of claim 3 , wherein the deadtime circuit is configured to apply the shifted compensation value to select the deadtime value stored in the lookup table.

5 . The circuit of claim 3 , wherein the selected number of bits is nine.

6 . The circuit of claim 1 , wherein the first transistor is coupled between a power terminal and a switching node, and the second transistor is coupled between the switching node and a reference voltage terminal.

7 . The circuit of claim 1 , wherein the controller is configured to delay turn-on of the second transistor, by a time represented by the deadtime value, after turn-off of the first transistor.

8 . A method, comprising:

calculating a compensation value based on an output voltage of a switching converter by a voltage loop filter of a compensation loop of the switching converter;

selecting a deadtime value based on the compensation value, the deadtime value defining an interval between turn-off of a first transistor and turn-on of a second transistor of the switching converter; and

applying the deadtime value to control switching of the first transistor and the second transistor.

9 . The method of claim 8 , further comprising storing the deadtime value in a lookup table of a controller of the switching converter.

10 . The method of claim 8 , further comprising retrieving the deadtime value from a lookup table of a controller of the switching converter.

11 . The method of claim 10 , further comprising right shifting, by the controller, the compensation value to produce a shifted compensation value.

12 . The method of claim 11 , further comprising applying the shifted compensation value to access the deadtime value stored in the lookup table.

13 . The method of claim 11 , wherein the compensation value is right shifted by nine bits.

14 . The method of claim 8 , further comprising:

turning off the first transistor;

delaying by a time defined by the deadtime value; and

turning on the second transistor after expiration.

15 . A switching converter comprising:

a first transistor and a second transistor coupled in series;

a controller coupled to the first transistor and the second transistor, the controller including:

a compensation loop including a voltage loop filter coupled to a voltage output terminal of the switching converter, the voltage loop filter configured to provide a compensation value based on an output voltage of the switching converter provided at the voltage output terminal; and

a deadtime circuit configured to determine a deadtime value based on the compensation value, the deadtime value defining an interval between turn-off of the first transistor and turn-on of the second transistor.

16 . The switching converter of claim 15 , wherein the deadtime circuit includes a lookup table storing the deadtime value, and the deadtime circuit is configured to retrieve the deadtime value from the lookup table based on the compensation value.

17 . The switching converter of claim 16 , wherein the deadtime circuit includes a shifter circuit configured to right-shift the compensation value by a selected number of bits to produce a shifted compensation value.

18 . The switching converter of claim 17 , wherein the deadtime circuit is configured to apply the shifted compensation value to select the deadtime value stored in the lookup table.

19 . The switching converter of claim 17 , wherein the selected number of bits is nine.

20 . The switching converter of claim 15 , wherein the first transistor is coupled between a power terminal and a switching node, and the second transistor is coupled between the switching node and a reference voltage terminal.