Logic circuitry packages storing tokens

1 . A logic circuitry package comprising an interface configured to communicate with a host logic circuit via a serial or packet-based digital communication protocol, and a logic circuit comprising a memory arrangement to:

store or generate a plurality of device-specific tokens corresponding to respective token indices, the logic circuit being implemented as a secure microcontroller,

wherein the logic circuit is configured to receive, via the interface, at least one challenge command from the host logic circuit comprising a command identifier and a subset of token indices; and

wherein the logic circuit is configured to, in response to the at least one challenge command, transmit over two separate transmissions a list of data including for the received subset of token indices a corresponding subset of tokens of the plurality of device-specific tokens, and for each remaining token of the plurality of device-specific tokens not corresponding to the received subset of token indices, a respective token image;

wherein the logic circuit is configured to:

receive the at least one challenge command comprising the command identifier followed by the subset of token indices which is followed by a corresponding subset of token passwords, wherein the command identifier is encoded as a number;

validate the subset of token passwords by comparing each token password of the subset of token passwords to a corresponding password check value stored in the memory arrangement identified based on the subset of token indices, wherein the password check values correspond to indices of the device-specific tokens, wherein all token passwords of the subset of token passwords must be individually validated for the subset of token passwords to be validated; and

in response to a successful validation of the subset of token passwords, transmit the list of data, wherein if any of the token passwords of the subset of token passwords is not individually validated, then the subset of token passwords are not validated and the logic circuit does not transmit the list of data,

wherein the list of data transmitted over the two separate transmissions corresponds collectively to all of the plurality of device-specific tokens.

2 . The logic circuitry package of claim 1 , wherein each of the two separate transmissions is in response to a respective challenge command from the host logic circuit.

3 . The logic circuitry package of claim 1 , wherein the logic circuit is configured to transmit a token image digest of a plurality of token images, each token image of the plurality of token images corresponding to a respective token of the plurality of tokens.

4 . The logic circuitry package of claim 3 , wherein the token image digest comprises a hash of the plurality of token images.

5 . The logic circuitry package of claim 1 , wherein the respective token image comprises a hash of each token of the remaining tokens of the plurality of tokens.

6 . The logic circuitry package of claim 1 , wherein the logic circuit is configured to, after a connection to a different host logic circuit and in response to receiving at least one new challenge command from that different host logic circuit, the at least one new challenge command comprising a new subset of token indices, transmit to the different host logic circuit a list of data including a new subset of tokens of the plurality of tokens corresponding to the received new subset of token indices and an image of each token of remaining tokens of the plurality of tokens not corresponding to the received new subset of token indices.

7 . The logic circuitry package of claim 1 , wherein the logic circuit is configured to not transmit more than a predetermined threshold of tokens of the plurality of tokens to a respective connected host logic circuit.

8 . The logic circuitry package of claim 6 , wherein the logic circuit is configured to transmit the lists of data to not more than a predetermined maximum of distinct host logic circuits.

9 . A logic circuitry package comprising an interface configured to communicate with a host logic circuit via a serial or packet-based digital communication protocol, and a logic circuit comprising a memory arrangement to:

store or generate a plurality of device-specific tokens corresponding to respective token indices, the logic circuit being implemented as a secure microcontroller;

wherein the logic circuit is configured to transmit a certificate comprising a token image digest in response to a request;

wherein the logic circuit is configured to receive, via the interface, at least one challenge command comprising a command identifier and a subset of token indices; and

wherein the logic circuit is configured, in response to the at least one challenge command, to transmit over two separate transmissions the tokens of the plurality of device-specific tokens corresponding to the subset of token indices;

wherein the logic circuit is configured to:

receive the at least one challenge command comprising the command identifier followed by the subset of token indices which is followed by a corresponding subset of token passwords, wherein the command identifier is encoded as a number;

validate the subset of token passwords by comparing each token password of the subset of token passwords to a corresponding password check value stored in the memory arrangement identified based on the subset of token indices, wherein the password check values correspond to indices of the device-specific tokens, wherein all token passwords of the subset of token passwords must be individually validated for the subset of token passwords to be validated; and

in response to a successful validation of the subset of token passwords, transmit the tokens of the plurality of device-specific tokens corresponding to the subset of token indices, wherein if any of the token passwords of the subset of token passwords is not individually validated, then the subset of token passwords are not validated and the logic circuit does not transmit the tokens,

wherein the token image digest comprises a digest of a plurality of token images, each token image of the plurality of token images corresponding to a respective token of the plurality of device-specific tokens.

10 . The logic circuitry package of claim 9 , wherein the certificate comprises a component ID signed with a certificate signing private key to facilitate the host logic circuit to validate the certificate using a public key corresponding to the certificate signing private key.

11 . The logic circuitry package of claim 9 , wherein the logic circuit is configured to transmit a respective token image for each token of the plurality of tokens not corresponding to the received subset of token indices.

12 . The logic circuitry package of claim 11 , wherein the logic circuit is configured to transmit, over a plurality of transmissions to the host logic circuit, a list of data comprising the tokens corresponding to the received subset of token indices and the images of respective tokens of the plurality of tokens not corresponding to the received subset of token indices, in response to a plurality of challenge commands.

13 . The logic circuitry package of claim 11 , wherein the respective token image for each token of the plurality of tokens not corresponding to the received subset of token indices comprises a hash of each token of the plurality of tokens not corresponding to the received subset of token indices.

14 . A replaceable print cartridge or component comprising a logic circuitry package comprising an interface configured to communicate with a host logic circuit via a serial or packet-based digital communication protocol, and a logic circuit comprising a memory arrangement to:

store or generate a plurality of device-specific tokens corresponding to respective token indices, the logic circuit being implemented as a secure microcontroller,

wherein the logic circuit is configured to receive, via the interface, at least one challenge command from the host logic circuit comprising a command identifier and a subset of token indices; and

wherein the logic circuit is configured to, in response to the at least one challenge command, transmit over two separate transmissions a list of data including for the received subset of token indices a corresponding subset of tokens of the plurality of device-specific tokens, and for each remaining token of the plurality of device-specific tokens not corresponding to the received subset of token indices, a respective token image;

wherein the logic circuit is configured to:

receive the at least one challenge command comprising the command identifier followed by the subset of token indices which is followed by a corresponding subset of token passwords, wherein the command identifier is encoded as a number;

validate the subset of token passwords by comparing each token password of the subset of token passwords to a corresponding password check value stored in the memory arrangement identified based on the subset of token indices, wherein the password check values correspond to indices of the device-specific tokens, wherein all token passwords of the subset of token passwords must be individually validated for the subset of token passwords to be validated; and

in response to a successful validation of the subset of token passwords, transmit the list of data, wherein if any of the token passwords of the subset of token passwords is not individually validated, then the subset of token passwords are not validated and the logic circuit does not transmit the list of data,

wherein the list of data transmitted over the two separate transmissions corresponds collectively to all of the plurality of device-specific tokens.