IP Library Granted Patent US 12696384
Granted Patent B2
US 12696384 · App. 18/714,498 · Granted Jul 28, 2026

Circuit board

Inventors: Dong Keon Lee (Seoul, KR); Seok Jong Youh (Seoul, KR)
Assignee: LG INNOTEK CO., LTD.
H05K1/0298H05K1/11H05K1/183H05K2201/09409
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Quick Facts
Patent No.
US 12696384
App. No.
18/714,498
Granted
Jul 28, 2026
Kind
B2
Abstract

A circuit board according to an embodiment includes a first insulating layer; a first circuit pattern layer disposed on the first insulating layer; and a second insulating layer disposed on the first circuit pattern layer and having a first cavity, wherein the first circuit pattern layer includes a first pad part vertically overlapping the first cavity; a second pad part that does not vertically overlap the first cavity; and a connection pattern part disposed between the first pad part and the second pad part, and the connection pattern part includes a first portion disposed inside the first cavity and connected to the first pad part, and a second portion disposed outside the first cavity and connected to the second pad part.

Claims (35)

1 . A circuit board comprising: a first insulating layer; a second insulating layer disposed on a first circuit pattern layer and having a first cavity; and the first circuit pattern layer disposed between the first insulating layer and the second insulating layer, wherein the first circuit pattern layer includes: a first pad part overlapping the first cavity along a vertical direction; a second pad part that does not overlap the first cavity along the vertical direction; and a connection pattern part disposed between the first pad part and the second pad part, wherein the connection pattern part includes a first portion disposed inside the first cavity and connected to the first pad part, and a second portion disposed outside the first cavity and connected to the second pad part, and wherein the connection pattern part includes a plurality of connection patterns extending along a direction from the inside of the first cavity to the outside of the first cavity and spaced apart from each other along a horizontal direction.

2 . The circuit board of claim 1 , wherein an upper surface of the first portion of the connection pattern part does not contact the second insulating layer while overlapping the first cavity in the vertical direction, and

wherein an upper surface of the second portion of the connection pattern part contacts the second insulating layer without overlapping the first cavity in the vertical direction.

3 . The circuit board of claim 1 , wherein the connection pattern part, the first pad part, and the second pad part overlap each other in the horizontal direction.

4 . The circuit board of claim 3 , wherein a width of the connection pattern part is smaller than a width of each of the first and second pad parts.

5 . The circuit board of claim 3 , wherein the connection pattern part has a first planar shape, and

wherein each of the first pad part and the second pad part has a second planar shape different from the first planar shape.

6 . The circuit board of claim 1 , wherein the second insulating layer includes a first inclined surface of the first cavity whose width decreases toward the first insulating layer,

wherein the first inclined surface includes a first end portion positioned adjacent to an upper surface of the second insulating layer at one side of the first cavity, and a second end portion positioned adjacent to a lower surface of the second insulating layer at the one side of the first cavity, and

wherein a horizontal distance between the first end portion and the second end portion satisfies a range of 0.1 μm to 25 μm.

7 . The circuit board of claim 6 , further comprising:

a protective layer disposed on the second insulating layer and including a through hole overlapping the first cavity in the vertical direction.

8 . The circuit board of claim 7 , wherein a width of the through hole of the protective layer is greater than a width of a region adjacent to an upper surface of the second insulating layer among an entire region of the first cavity.

9 . The circuit board of claim 8 , wherein the second insulating layer includes a first upper surface adjacent to the first end portion of the first inclined surface and vertically overlapping the through hole of the protective layer, and

wherein a width of the first upper surface is a horizontal distance between the first end portion and an inner wall of the through hole of the protective layer adjacent to the first end portion, and satisfies a range of 50 μm to 80 μm.

10 . The circuit board of claim 7 , further comprising:

a second circuit pattern layer disposed on the second insulating layer, and

wherein a pattern of the second circuit pattern layer disposed closest to the first end portion is spaced apart from an inner wall of the through hole of the protective layer by a spacing in a range of 55 μm to 95 μm.

11 . The circuit board of claim 1 , further comprising:

a first through electrode disposed in the second insulating layer,

wherein the first through electrode includes an inclined surface whose width gradually narrows in a direction from an upper surface of the first through electrode to a lower surface of the first through electrode, and

wherein the inclination surface of the first through electrode overlaps the first cavity along the horizontal direction.

12 . The circuit board of claim 11 , further comprising:

a second through electrode disposed in the second insulating layer,

wherein the second through electrode has an inclined surface having an inclination different from that of the first through electrode.

13 . The circuit board of claim 12 , wherein the second through electrode includes an inclined surface whose width gradually narrows in a direction from an upper surface of the second through electrode to a lower surface of the second through electrode.

14 . The circuit board of claim 12 , wherein the inclined surface of the first through electrode and the inclined surface of the second through electrode are inclined in opposite directions.

15 . The circuit board of claim 1 , wherein the first circuit pattern layer is embedded in an upper surface of the first insulating layer.

16 . The circuit board of claim 6 , wherein the second insulating layer includes a second cavity spaced apart from the first cavity in the horizontal direction and having a second inclined surface whose width decreases toward the first insulating layer,

wherein the second inclined surface includes a third end portion adjacent to an upper surface of the second insulating layer and the first end portion of the first inclined surface, and

wherein a spacing between the first end portion and the third end portion satisfies a range of 100μm to 150 μm.

17 . The circuit board of claim 1 , further comprising:

an electronic device disposed in the first cavity.

18 . The circuit board of claim 17 , further comprising:

a burying insulating layer disposed in the first cavity and burying the electronic device.