Microelectronic devices with support pillars spaced along a slit region between pillar array blocks
A microelectronic device includes a stack structure comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. At least one slit region divides the stack structure into blocks. Each block comprises an array of active pillars. Along the at least one slit region is a horizontally alternating sequence of slit structure segments and support pillar structures. The slit structure segments and the support pillar structures each extend vertically through the stack structure. Additional microelectronic devices are also disclosed as are related methods and electronic systems.
1 . A microelectronic device, comprising:
a tiered stack structure comprising a vertically repeated sequence of material structures comprising insulative structures and conductive structures; and
in a slit region that extends along a length of the tiered stack structure, a horizontally alternating sequence of slit structure segments and support pillar segments,
wherein at least one of the support pillar segments defines tapering sidewalls such that the at least one of the support pillar segments is relatively longer adjacent a lower surface of the tiered stack structure than adjacent an upper surface of the tiered stack structure.
2 . The microelectronic device of claim 1 , wherein the support pillar segments individually comprise a region of an additional insulative material extending vertically through the tiered stack structure.
3 . The microelectronic device of claim 2 , wherein at least some of the insulative structures of the tiered stack structure protrude laterally into the additional insulative material of the support pillar segments.
4 . The microelectronic device of claim 2 , wherein, adjacent the upper surface of the tiered stack structure, the additional insulative material of the at least one of the support pillar segments is relatively narrower than a neighboring one of the slit structure segments.
5 . The microelectronic device of claim 1 , further comprising a stack of insulative bridges extending across a width of the slit region, the insulative bridges provided by portions of the insulative structures of the tiered stack structure.
6 . The microelectronic device of claim 5 , wherein the insulative bridges of the stack of insulative bridges increase in length with decreased elevation through the stack of insulative bridges.
7 . The microelectronic device of claim 1 , wherein some of the conductive structures laterally protrude into the slit region without laterally spanning the slit region.
8 . The microelectronic device of claim 1 , wherein the at least one of the support pillar segments is relatively narrower in width adjacent the lower surface of the tiered stack structure than adjacent the upper surface of the tiered stack structure.
9 . The microelectronic device of claim 1 , wherein the at least one of the support pillar segments protrudes into a base region below the tiered stack structure.
10 . The microelectronic device of claim 1 , wherein the vertically repeated sequence of material structures consists of one of the insulative structures and one of the conductive structures.
11 . A microelectronic device, comprising:
a stack structure comprising a vertically alternating sequence of material structures arranged in tiers and comprising insulative structures and conductive structures;
arrays of pillars extending through the stack structure, the pillars of the arrays comprising at least one channel material; and
in a region spacing neighboring arrays of the arrays of pillars:
support pillar structures arranged in a series and extending through the stack structure, the support pillar structures comprising an additional insulative material; and
slit structure segments arranged in an additional series and comprising a nonconductive material,
the slit structure segments horizontally alternating with the support pillar structures, each of the slit structure segments being horizontally interposed between a pair of the support pillar structures,
at least one of the support pillar structures comprising tapering sidewalls,
a length of the at least one of the support pillar structures being relatively shorter at an elevation of an upper surface of the stack structure than at an elevation of a lower surface of the stack structure.