Semiconductor device and method of manufacturing semiconductor device
A semiconductor device may include a gate structure including stacked local lines and a multi-step structure, wherein the multi-step structure defines pads of the local lines, channel patterns respectively disposed over the pads, a block word line disposed over the channel patterns and extending along a profile of the multi-step structure, and first contact plugs passing through the channel patterns and respectively connecting the channel patterns and the local lines.
1 . A semiconductor device comprising:
a gate structure including stacked local lines and a multi-step structure, wherein the multi-step structure defines pads of the local lines;
channel patterns respectively disposed over the pads;
a block word line disposed over the channel patterns and extending along a profile of the multi-step structure; and
first contact plugs passing through the channel patterns and respectively connecting the channel patterns and the local lines.
2 . The semiconductor device of claim 1 , further comprising:
global lines disposed over the gate structure; and
second contact plugs respectively connecting the channel patterns and the global lines.
3 . The semiconductor device of claim 1 , wherein the multi-step structure extends in a first direction, and the channel patterns are arranged in the first direction.
4 . The semiconductor device of claim 1 , wherein the block word line extends in a first direction, and the channel patterns extend in a second direction crossing the first direction.
5 . The semiconductor device of claim 1 , further comprising:
a gate insulating layer disposed between the channel patterns and the block word line.
6 . The semiconductor device of claim 1 , further comprising:
an etch stop layer disposed over the block word line.
7 . The semiconductor device of claim 6 , wherein the first contact plugs pass through the etch stop layer.
8 . The semiconductor device of claim 1 , wherein the block word line includes a plurality of protrusions spaced apart from each other and protruding between the channel patterns.
9 . The semiconductor device of claim 8 , wherein the block word line surrounds top surfaces and sidewalls of the channel patterns.
10 . A semiconductor device comprising:
a gate structure including stacked local lines;
first contact plugs extending through the gate structure and respectively connected to the local lines;
channel patterns disposed over the gate structure and respectively connected to the first contact plugs; and
a block word lines disposed over the channel patterns.
11 . The semiconductor device of claim 10 , further comprising:
global lines disposed over the gate structure; and
second contact plugs respectively connecting the channel patterns and the global lines.
12 . The semiconductor device of claim 11 , wherein the first contact plugs are connected to lower surfaces of the channel patterns, and the second contact plugs are connected to top surfaces of the channel patterns.
13 . The semiconductor device of claim 10 , further comprising:
gate insulating layers respectively surrounding the channel patterns.
14 . The semiconductor device of claim 10 , further comprising:
a capping layer disposed over the block word line and surrounding a sidewall of the block word line.
15 . The semiconductor device of claim 14 , further comprising:
global lines disposed over the gate structure; and
second contact plugs passing through the capping layer and respectively connecting the channel patterns and the global lines.
16 . The semiconductor device of claim 10 , wherein the block word line includes protrusions protruding between the channel patterns.
17 . The semiconductor device of claim 16 , wherein the block word line surrounds top surfaces and sidewalls of the channel patterns.
18 . The semiconductor device of claim 10 , further comprising:
a third contact plug connected to the block word line.