IP Library Granted Patent US 12696462
Granted Patent B2
US 12696462 · App. 18/176,557 · Granted Jul 28, 2026

Semiconductor device and method for manufacturing the same

Inventors: Kiichi Tachi (Yokkaichi Mie, JP); Ryota Nihei (Yokkaichi Mie, JP); Yoshikazu Hosomura (Kamakura Kanagawa, JP)
Assignee: KIOXIA CORPORATION
H10B80/00H10W72/00H10W72/536H10W72/922H10W72/941H10W72/9415H10W72/944H10W72/951H10W72/952H10W80/312H10W80/327H10W80/333H10W90/792
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Quick Facts
Patent No.
US 12696462
App. No.
18/176,557
Granted
Jul 28, 2026
Kind
B2
Abstract

A semiconductor device includes a metal layer disposed above a transistor on a first substrate. The metal layer includes a first region extending in a first direction and a second region that has a width in the first direction smaller than the first region and protrudes from the first region in a second direction, and has a first corner portion having an angle larger than 180° as viewed in a third direction between a proximal end portion of the second region and the first region. The metal layer includes a first portion that is disposed within the first region and has a lower surface at a first height, and a second portion that is disposed within the second region and has a lower surface at a second height lower than the first height. A step present at a boundary between the first portion and the second portion is disposed away from an edge of the second region at a first position near the first corner portion in the second direction and adjacent to the edge of the second region at a second position away from the first corner portion than the first position.

Claims (21)

1 . A semiconductor device comprising:

a first substrate;

a transistor disposed on the first substrate;

a memory cell array disposed above the transistor; and

a metal layer disposed above the transistor, wherein the metal layer includes

a first region extending in a first direction,

a second region that has a width in the first direction smaller than the first region, protrudes from the first region in a second direction intersecting the first direction, and includes a wire connection portion,

a first corner portion provided between a proximal end portion of the second region and the first region and having an angle larger than 180° as viewed in a third direction intersecting the first direction and the second direction,

wherein the second region includes a first portion that has a lower surface at a first height and a second portion that has a lower surface at a second height lower than the first height, and a step at a boundary between the first portion and the second portion, and

the step is disposed farther away from an edge of the second region at a first position adjacent the first corner portion in the second direction and adjacent to the edge of the second region at a second position farther away from the first corner portion than the first position.

2 . The semiconductor device according to claim 1 , wherein the metal layer further includes a third region extending from the first region to a side opposite to the second region.

3 . The semiconductor device according to claim 1 , wherein a distance between the second portion and the first corner portion as viewed in the third direction is 1 μm or more.

4 . The semiconductor device according to claim 1 , wherein the metal layer further includes a first slope, the first slope connecting the first portion to the second portion and being angled between the first portion and the second portion.

5 . The semiconductor device according to claim 1 , wherein the second portion has a shape such that a corner on a side of the first corner portion is depressed as viewed in the third direction.

6 . The semiconductor device according to claim 1 , wherein the metal layer further includes a third portion disposed within the second region and having a lower surface at a third height lower than the second height.

7 . The semiconductor device according to claim 6 , wherein a distance between the third portion and the first corner portion as viewed in the third direction is 1 μm or more.

8 . The semiconductor device according to claim 6 , further comprising a first via plug disposed under the third portion.

9 . The semiconductor device according to claim 6 , wherein the metal layer further includes a second slope, the second slope connecting the second portion to the third portion and being angled between the second portion and the third portion.

10 . The semiconductor device according to claim 2 , wherein the metal layer further includes a fourth portion disposed within the third region and having a lower surface at a fourth height lower than the first height.

11 . The semiconductor device according to claim 10 , further comprising a second via plug disposed under the fourth portion.

12 . The semiconductor device according to claim 1 , wherein the second region has a second corner portion having an angle smaller than 180° as viewed in the third direction, the second corner portion disposed at a tip end, wherein a distance between the second portion and the first corner portion is longer than a distance between the second portion and the second corner portion as viewed in the third direction.