IP Library Granted Patent US 12696482
Granted Patent B2
US 12696482 · App. 19/264,384 · Granted Jul 28, 2026

Semiconductor device

Inventors: Ryou Kato (Osaka, JP); Ryosuke Okawa (Nara, JP); Ryo Yoshii (Kyoto, JP); Eiji Yasuda (Osaka, JP)
Assignee: Nuvoton Technology Corporation Japan
H10D30/668H10D30/665H10D62/102H10D62/126H10D62/60H10D64/252H10D8/411H10D30/0297H10D84/143
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Quick Facts
Patent No.
US 12696482
App. No.
19/264,384
Granted
Jul 28, 2026
Kind
B2
Abstract

A semiconductor device includes a vertical metal-oxide semiconductor (MOS) transistor that includes: first trenches provided from an upper surface of a low-concentration impurity layer and penetrating through a body region, and extending in a first direction; and second trenches provided from the upper surface of the low-concentration impurity layer and penetrating through the body region to a depth deeper than the depth of the first trenches, and extending in the first direction. The first trenches and the second trenches are alternately disposed in a second direction, first conductors connected to a gate electrode are provided inside the first trenches and in upper portions inside the second trenches, second conductors connected to the source electrode are provided in lower portions inside the second trenches, and a pitch between the second conductors is twice a pitch between the first conductors in the second direction.

Claims (23)

1 . A semiconductor device comprising:

a vertical metal-oxide semiconductor (MOS) transistor that includes:

a semiconductor substrate of a first conductivity type;

a low-concentration impurity layer of the first conductivity type, the low-concentration impurity layer being provided above and in contact with the semiconductor substrate and having an impurity concentration lower than a predetermined impurity concentration of the semiconductor substrate;

a body region of a second conductivity type that is different from the first conductivity type, the body region being provided in the low-concentration impurity layer;

a source region of the first conductivity type, the source region being provided in the body region;

a source electrode electrically connected to the body region and the source region;

a plurality of first trenches provided from an upper surface of the low-concentration impurity layer and penetrating through the body region to a depth up to a portion of the low-concentration impurity layer, the plurality of first trenches each having a portion in contact with the source region and extending in a first direction parallel to the upper surface of the low-concentration impurity layer; and

a plurality of second trenches provided from the upper surface of the low-concentration impurity layer and penetrating through the body region to a depth deeper than the depth of the plurality of first trenches, the plurality of second trenches each having a portion in contact with the source region and extending in the first direction with a constant width in a second direction parallel to the upper surface of the low-concentration impurity layer and orthogonal to the first direction,

wherein the plurality of first trenches and the plurality of second trenches are alternately disposed in the second direction,

a plurality of first conductors connected to a gate electrode of the vertical MOS transistor are provided inside the plurality of first trenches and in upper portions inside the plurality of second trenches,

a plurality of second conductors connected to the source electrode and separated from the plurality of first conductors are provided in lower portions inside the plurality of second trenches,

a pitch between the plurality of second conductors in the second direction is twice a pitch between the plurality of first conductors in the second direction,

a midpoint of a nearest-neighbor distance between a pair of first conductors adjacent to each other in the second direction among the plurality of first conductors is closer to one of the plurality of first trenches than a midpoint of a pitch between the pair of the first conductors adjacent to each other in the second direction,

a width in the second direction of each of first conductors provided inside the plurality of first trenches among the plurality of first conductors is narrower than a width in the second direction of each of first conductors provided inside the plurality of second trenches among the plurality of first conductors, and

the width in the second direction of each of first conductors provided inside the plurality of first trenches among the plurality of first conductors is narrower than a width in the second direction of each of the plurality of second conductors provided inside the plurality of second trenches.

2 . The semiconductor device according to claim 1 ,

wherein inside the plurality of second trenches, an insulating film that separates the first conductors among the plurality of first conductors from the plurality of second conductors is provided at a position at a depth that is same as the depth of the plurality of first trenches in a third direction orthogonal to the first direction and the second direction.

3 . The semiconductor device according to claim 1 , wherein a width in the second direction of each of the plurality of first trenches is narrower than a width in the second direction of each of the plurality of second trenches.

4 . The semiconductor device according to claim 1 , wherein:

a plurality of source regions are provided in the vertical MOS transistor,

the vertical MOS transistor comprises a plurality of connection portions that electrically connect the body region and the source electrode, and alternately arranged with the plurality of source regions in the first direction, and

the plurality of second trenches are adjacent to the plurality of source regions and the plurality of connection portions.