Volume-less fluorine incorporation method

1 . A method comprising:

removing a dummy gate stack to form a trench between gate spacers;

depositing a gate dielectric extending into the trench;

depositing a work-function layer on the gate dielectric;

performing a first treatment process on the gate dielectric and the work-function layer, wherein the first treatment process is performed using a fluorine-containing gas;

performing a first drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric;

performing a second treatment process on the gate dielectric and the work-function layer, wherein the second treatment process is performed using the fluorine-containing gas;

performing a second drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric; and

after the second drive-in process, forming conductive layers to fill the trench.

2 . The method of claim 1 further comprising:

after the first drive-in process, removing a first fluorine-containing layer formed due to the first treatment process; and

after the second drive-in process, removing a second fluorine-containing layer formed due to the second treatment process.

3 . The method of claim 2 further comprising, after the second fluorine-containing layer is removed, performing a cleaning process to further remove residues of the first fluorine-containing layer and the second fluorine-containing layer.

4 . The method of claim 2 , wherein the fluorine-containing gas comprises tungsten fluoride, and the first fluorine-containing layer and the second fluorine-containing layer further comprise tungsten therein.

5 . The method of claim 1 , wherein the fluorine-containing gas comprises nitrogen fluoride.

6 . The method of claim 1 , wherein the first drive-in process comprises an annealing process.

7 . The method of claim 1 further comprising:

after the second drive-in process, performing a third treatment process on the gate dielectric, wherein the third treatment process is performed using the fluorine-containing gas; and

performing a third drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric.

8 . The method of claim 2 further comprising:

depositing the first fluorine-containing layer before the first drive-in process; and

depositing the second fluorine-containing layer, wherein the removing the first fluorine-containing layer is performed before the second fluorine-containing layer is deposited.

9 . The method of claim 8 , wherein the first fluorine-containing layer and the second fluorine-containing layer comprise a same material.

10 . A method comprising:

forming a dummy gate stack on a top surface and sidewalls of a multilayer stack, wherein the multilayer stack comprises a plurality of sacrificial layers and a plurality of nanostructures located alternatingly;

removing the dummy gate stack to form a recess in a dielectric layer;

removing the plurality of sacrificial layers;

depositing gate dielectrics wrapping around the plurality of nanostructures;

depositing work-function layers on the gate dielectrics;

performing a plurality of cycles, wherein each of the plurality of cycles comprises:

forming a plurality of fluorine-containing layers, each on one of the gate dielectrics;

driving-in fluorine in the plurality of fluorine-containing layers into the gate dielectrics; and

removing the plurality of fluorine-containing layers; and

after the plurality of cycles, forming a conductive layer, wherein the conductive layer comprises portions in gaps between the plurality of nanostructures.

11 . The method of claim 10 , wherein the forming the plurality of fluorine-containing layers comprises treating the gate dielectrics using WF 6 as a process gas.

12 . The method of claim 11 , wherein the removing the plurality of fluorine-containing layers is performed using NF 3 as an etching gas.

13 . The method of claim 10 , wherein in each of the plurality of cycles, the plurality of fluorine-containing layers formed before the driving-in is fully removed.

14 . The method of claim 10 , wherein the driving-in fluorine comprises an annealing process.

15 . The method of claim 14 , wherein the forming the plurality of fluorine-containing layers is performed at a first wafer temperature, and the driving-in fluorine is performed at a second wafer temperature different from the first wafer temperature.

16 . The method of claim 10 , wherein the removing the plurality of fluorine-containing layers is performed through a dry etching process, and wherein the method further comprises, after the plurality of cycles, performing a wet etching process to etch residues of the plurality of fluorine-containing layers.

17 . The method of claim 10 , wherein the plurality of cycles are performed on the work-function layers.

18 . A method comprising:

forming a nanostructure in a trench, with gate spacers being on opposite sides of the trench;

depositing a gate dielectric extending into the trench to encircle the nanostructure, wherein the gate dielectric comprises a high-k dielectric material; and

after the gate dielectric is deposited, performing a plurality of cycles, wherein each of the plurality of cycles comprises:

performing a treatment process on the gate dielectric using WF 6 as a first process gas; and

after the treatment process, performing an etching process using NF 3 as a second process gas.

19 . The method of claim 18 further comprising a drive-in process in each of the plurality of cycles, wherein the drive-in process is performed after the treatment process and before the etching process.

20 . The method of claim 18 , wherein the treatment process results in a tungsten-and-fluorine-containing layer being left on the gate dielectric, and wherein the etching process results in the tungsten-and-fluorine-containing layer to be etched.