Source/drain contacts and methods for forming the same

1 . A semiconductor structure, comprising:

a source/drain feature over a substrate;

a metal gate structure extending lengthwise along a first direction and adjacent to the source/drain feature;

a gate isolation structure extending lengthwise along a second direction substantially perpendicular to the first direction, wherein the gate isolation structure divides the metal gate structure into two isolated portions; and

a source/drain contact electrically coupled to the source/drain feature and including a first portion directly above the source/drain feature and a second portion extending from the first portion along the first direction,

wherein a first top surface of the first portion and a second top surface of the second portion are aligned,

wherein the first portion has a first width along the second direction and the second portion has a second width along the second direction, the first width being greater than the second width.

2 . The semiconductor structure of claim 1 , wherein the second portion of the source/drain contact includes two edges curved inward from a top view.

3 . The semiconductor structure of claim 1 , wherein from a cross-sectional view, a boundary of the gate isolation structure is directly under the second portion of the source/drain contact.

4 . The semiconductor structure of claim 1 , wherein the first portion of the source/drain contact has a first depth and the second portion of the source/drain contact has a second depth less than the first depth.

5 . The semiconductor structure of claim 1 , further comprising:

an isolation feature over the substrate and under the gate isolation structure; and

gate spacers extending lengthwise along the first direction and including a first part on sidewalls of the metal gate structure and a second part disposed directly over the isolation feature, wherein the second part of the gate spacers is directly under a first part of the gate isolation structure.

6 . The semiconductor structure of claim 5 , wherein the gate isolation structure further includes a second part adjacent to the second part of the gate spacers, wherein the second part of the gate isolation structure extends into the isolation feature and has a bottom surface lower than a bottom surface of the first part of the gate isolation structure.

7 . The semiconductor structure of claim 1 , wherein the first top surface is above a top surface of the metal gate structure.

8 . The semiconductor structure of claim 1 , wherein the source/drain feature is a first source/drain feature and the source/drain contact is a first source/drain contact,

wherein the semiconductor structure further comprises:

a second source/drain feature, such that the metal gate structure is disposed between the first and the second source/drain features, and

a second source/drain contact electrically coupled to the second source/drain feature and having a third portion directly above the second source/drain feature and a fourth portion extending from the third portion along the first direction,

wherein the third portion has a third width and the fourth portion has a fourth width less than the third width.

9 . The semiconductor structure of claim 8 , wherein the fourth portion of the second source/drain contact includes a first edge curved inward and a second edge opposite to the first edge and aligned with an edge of the third portion from a top view.

10 . The semiconductor structure of claim 9 , wherein the fourth portion of the second source/drain contact has a depth less than a depth of the third portion of the second source/drain contact and greater than a depth of the second portion of the first source/drain contact.

11 . A semiconductor structure, comprising:

a first and a second source/drain features over a substrate;

a first and a second metal gate structures extending lengthwise along a first direction over the substrate and adjacent to the first and the second source/drain features, respectively;

a gate isolation structure extending lengthwise along a second direction substantially perpendicular to the first direction, wherein the first and the second metal gate structures are isolated by the gate isolation structure; and

a source/drain contact including two first portions directly over the first and second source/drain features and a second portion connecting the two first portions,

wherein the second portion is on a sidewall of the gate isolation structure, and

wherein the two first portions and the second portion have different widths along the second direction.

12 . The semiconductor structure of claim 11 , wherein the second portion of the source/drain contact is embedded in the gate isolation structure.

13 . The semiconductor structure of claim 11 , wherein the second portion of the source/drain contact is directly above a part of the gate isolation structure.

14 . The semiconductor structure of claim 11 , further comprising:

an isolation feature disposed between the first and second source/drain features; and

gate spacers having a first portion on sidewalls of the first and the second metal gate structures and a second portion disposed directly over the isolation feature, wherein the second portion of the source/drain contact is spaced apart from the gate isolation structure by the second portion of the gate spacers.

15 . The semiconductor structure of claim 14 , further comprising: a dielectric layer adjacent to the gate spacers, wherein the source/drain contact is embedded in the dielectric layer.

16 . The semiconductor structure of claim 11 , wherein from a top view, a profile of the source/drain contact resembles a dumbbell shape.

17 . A semiconductor structure, comprising:

a substrate;

a first and a second active regions over the substrate and in parallel to each other, wherein the first active region includes a first source/drain feature, and the second active region includes a second source/drain feature;

a metal gate structure extending lengthwise along a first direction, over the first and the second active regions, and adjacent to the first and the second source/drain features; and

a source/drain contact including two first portions directly over the first and the second source/drain features, respectively, and a second portion extending between the two first portions,

wherein the second portion shares a continuous edge with the two first portions in a top view,

wherein the two first portions have a first width along a second direction substantially perpendicular to the first direction and the second portion has a second width along the second direction, the first width being greater than the second width.

18 . The semiconductor structure of claim 17 , further comprising:

gate spacers on sidewalls of the metal gate structure; and

a gate isolation structure extending lengthwise along the second direction and between the first and the second active regions,

wherein the gate isolation structure divides the metal gate structure into two isolated portions and includes a dielectric material different from the gate spacers.

19 . The semiconductor structure of claim 18 , wherein the gate isolation structure includes an outer layer and an inner layer embedded in the outer layer.

20 . The semiconductor structure of claim 17 , further comprising a first and a second gate isolation structures extending lengthwise along the second direction and between the first and the second active regions,

wherein the first gate isolation structure divides the metal gate structure into two isolated portions, and

wherein the second portion of the source/drain contact is between the first and the second gate isolation structures.