Metal gate cut formed after source and drain contacts
Techniques are provided herein to form semiconductor devices that include a gate cut formed after the formation of source/drain contacts. In an example, a semiconductor device includes a gate structure around or otherwise on a semiconductor region that extends from a source region to a drain region. Conductive contacts formed over the source and drain regions along a source/drain trench. The gate structure may be interrupted with a dielectric gate cut that further extends past the gate trench and into the source/drain trench where it can cut into one or more of the contacts. The contacts are formed before the gate cut to ensure complete fill of conductive material when forming the contacts. Accordingly, a liner structure on the conductive contacts is also broken by the intrusion of the gate cut and does not extend further up or down the sidewalls of the gate cut.
1 . An integrated circuit comprising:
a semiconductor region extending in a first direction from a first source or drain region to a second source or drain region;
a gate structure extending in a second direction over the semiconductor region;
a liner structure comprising one or more layers of conductive material on the first source or drain region;
a conductive contact on the liner structure; and
a gate cut adjacent to the semiconductor region and extending in the first direction through the gate structure and interrupting at least a portion of the conductive contact, the gate cut comprising a dielectric material and extending along an entire height of the first source or drain region;
wherein an end of the liner structure abuts a sidewall of the gate cut and the liner structure does not extend any further up or down the sidewall of the gate cut.
2 . The integrated circuit of claim 1 , wherein the one or more layers of conductive material include a layer that has titanium.
3 . The integrated circuit of claim 2 , wherein the layer that has titanium further includes nitrogen.
4 . The integrated circuit of claim 1 , wherein the one or more layers of conductive material include a layer that has tungsten, carbon, and nitrogen.
5 . The integrated circuit of claim 1 , wherein the gate structure includes a gate dielectric around the semiconductor region, and the gate dielectric is not present on any sidewall of the gate cut.
6 . The integrated circuit of claim 1 , wherein the dielectric material comprises silicon and nitrogen.
7 . A printed circuit board comprising the integrated circuit of claim 1 .
8 . An electronic device, comprising:
a chip package comprising one or more dies, at least one of the one or more dies comprising:
a first semiconductor device having a first semiconductor region extending in a first direction from a first source or drain region, a first gate structure extending in a second direction over the first semiconductor region, a first liner structure having one or more first layers of conductive material on the first source or drain region, and a first conductive contact over the first source or drain region, such that the first liner structure is between the first source or drain region and the first conductive contact;
a second semiconductor device having a second semiconductor region extending in the first direction from a second source or drain region, a second gate structure extending in the second direction over the second semiconductor region, a second liner structure having one or more second layers of conductive material on the second source or drain region, and a second conductive contact over the second source or drain region, such that the second liner structure is between the second source or drain region and the second conductive contact; and
a gate cut between the first semiconductor region and the second semiconductor region and extending in the first direction between the first conductive contact and the second conductive contact, the gate cut comprising a dielectric material;
wherein an end of the first liner structure abuts a first sidewall of the gate cut, and an end of the second liner structure abuts a second sidewall of the gate cut opposite from the first sidewall.
9 . The electronic device of claim 8 , wherein the one or more first layers of conductive material include a layer that has titanium.
10 . The electronic device of claim 9 , wherein the layer that has titanium includes titanium and nitrogen.
11 . The electronic device of claim 8 , wherein the one or more first layers of conductive material include a layer that has tungsten, carbon, and nitrogen.
12 . The electronic device of claim 8 , wherein the gate structure includes a gate dielectric around the semiconductor region, and the gate dielectric is not present on any sidewall of the gate cut.
13 . The electronic device of claim 8 , wherein the dielectric material comprises silicon and nitrogen.
14 . The electronic device of claim 8 , further comprising a printed circuit board, wherein the chip package is coupled to the printed circuit board.
15 . An integrated circuit comprising:
a semiconductor region extending in a first direction from a first source or drain region to a second source or drain region;
a gate structure extending in a second direction over the semiconductor region;
a first liner structure having one or more first layers of conductive material on the first source or drain region;
a second liner structure having one or more second layers of conductive material on the second source or drain region;
a first conductive contact on the first liner structure;
a second conductive contact on the second liner structure; and
a gate cut adjacent to the semiconductor region and extending in the first direction through the gate structure and interrupting at least a portion of the first conductive contact and at least a portion of the second conductive contact, the gate cut comprising a dielectric material and extending along an entire height of the first source or drain region and the second source or drain region;
wherein an end of the first liner structure abuts a sidewall of the gate cut, and an end of the second liner structure abuts the sidewall of the gate cut.
16 . The integrated circuit of claim 15 , wherein the one or more first layers of conductive material include a first layer that has titanium and the one or more second layers of conductive material include a second layer that has titanium.
17 . The integrated circuit of claim 15 , wherein the one or more first layers of conductive material include a layer that has tungsten, carbon, and nitrogen, and the one or more second layers of conductive material include a layer that has tungsten, carbon, and nitrogen.
18 . The integrated circuit of claim 15 , wherein the gate structure includes a gate dielectric around the semiconductor region, and the gate dielectric is not present on any sidewall of the gate cut.
19 . The integrated circuit of claim 15 , wherein the dielectric material comprises silicon and nitrogen.
20 . A printed circuit board comprising the integrated circuit of claim 15 .