IP Library Granted Patent US 12696547
Granted Patent B2
US 12696547 · App. 18/344,564 · Granted Jul 28, 2026

Transformer device and semiconductor device

Inventors: Toshihiro Imasaka (Tokyo, JP); Yasuo Yamaguchi (Tokyo, JP)
Assignee: Mitsubishi Electric Corporation
H10D86/85H10D84/40H10W90/00H10W72/07554H10W72/547H10W72/944H10W90/753
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Quick Facts
Patent No.
US 12696547
App. No.
18/344,564
Granted
Jul 28, 2026
Kind
B2
Abstract

According to the present disclosure, a transformer device comprises a first coil; a conductor provided outside the first coil in plan view and having a reference potential equal to a reference potential of the first coil; a first insulating layer provided above the first coil; a second coil provided on an upper surface of the first insulating layer; a second insulating layer provided between the second coil and the conductor so that a gap occurs between the second insulating layer and the first insulating layer; and a third insulating layer covering the first insulating layer, the second insulating layer, the second coil and the conductor.

Claims (40)

1 . A transformer device comprising:

a first coil;

a conductor provided outside the first coil in plan view and having a reference potential equal to a reference potential of the first coil;

a first insulating layer provided above the first coil;

a second coil provided on an upper surface of the first insulating layer;

a second insulating layer provided between the second coil and the conductor so that a gap occurs between the second insulating layer and the first insulating layer; and

a third insulating layer covering the first insulating layer, the second insulating layer, the second coil and the conductor, wherein the third insulating layer separates the second insulating layer and the first insulating layer in a radial direction of the second coil in plan view.

2 . The transformer device according to claim 1 ,

wherein an upper surface of the second insulating layer is located higher than the upper surface of the first insulating layer.

3 . The transformer device according to claim 1 , further comprising:

a fourth insulating layer provided on an upper surface of the first coil,

wherein the fourth insulating layer has a region with a thin film thickness in a range in which the fourth insulating layer faces the gap.

4 . The transformer device according to claim 1 , comprising:

a fifth insulating layer between the first coil and the first insulating layer.

5 . The transformer device according to claim 4 ,

wherein the fifth insulating layer has a region with a thin film thickness in a range in which the fifth insulating layer faces the gap.

6 . The transformer device according to claim 4 ,

wherein the fifth insulating layer has a recessed region filled with the third insulating layer in a range in which the fifth insulating layer faces the gap.

7 . The transformer device according to claim 1 ,

wherein the second insulating layer has a recess filled with the third insulating layer on an upper surface.

8 . The transformer device according to claim 1 ,

wherein the first insulating layer and the second insulating layer are organic insulating layers.

9 . The transformer device according to claim 1 ,

wherein the first coil and the second coil are formed with flat plates.

10 . The transformer device according to claim 1 ,

wherein the transformer device is formed with a wide band gap semiconductor.

11 . The transformer device according to claim 10 ,

wherein the wide band gap semiconductor is silicon carbide, a gallium nitride material or diamond.

12 . A semiconductor device comprising:

the transformer device according to claim 1 ;

a first semiconductor circuit electrically connected to the first coil; and

a second semiconductor circuit electrically connected to the second coil.

13 . The semiconductor device according to claim 12 , wherein the transformer device, the first semiconductor circuit and the second semiconductor circuit are formed on the same chip.

14 . A transformer device comprising:

a first coil;

a conductor provided outside the first coil in plan view and having a reference potential equal to a reference potential of the first coil;

a first insulating layer provided above the first coil;

a second coil provided on an upper surface of the first insulating layer;

a second insulating layer provided between the second coil and the conductor so that a gap occurs between the second insulating layer and the first insulating layer; and

a third insulating layer covering the first insulating layer, the second insulating layer, the second coil and the conductor, wherein the third insulating layer circumferentially separates the second insulating layer and the first insulating layer in a radial direction of the second coil in plan view.