IP Library Granted Patent US 12696553
Granted Patent B2
US 12696553 · App. 18/502,059 · Granted Jul 28, 2026

Back-illuminated sensor and a method of manufacturing a sensor using a silicon on insulator wafer

Inventors: Abbas Haddadi (San Jose, CA); Sisir Yalamanchili (Milpitas, CA); John Fielden (Los Altos, CA); Yung-Ho Alex Chuang (Cupertino, CA)
Assignee: KLA Corporation
H10F39/026H10F39/199H10F39/80
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Quick Facts
Patent No.
US 12696553
App. No.
18/502,059
Granted
Jul 28, 2026
Kind
B2
Abstract

An image sensor is fabricated by first heavily p-type doping the thin top monocrystalline silicon substrate of an SOI wafer, then forming a relatively lightly p-doped epitaxial layer on a top surface of the top silicon substrate, where p-type doping levels during these two processes are controlled to produce a p-type dopant concentration gradient in the top silicon substrate. Sensing (circuit) elements and associated metal interconnects are fabricated on the epitaxial layer, then the handling substrate and oxide layer of the SOI wafer are at least partially removed to expose a lower surface of either the top silicon substrate or the epitaxial layer, and then a pure boron layer is formed on the exposed lower surface. The p-type dopant concentration gradient monotonically decreases from a maximum level near the top-silicon/epitaxial-layer interface to a minimum concentration level at the epitaxial layer's upper surface.

Claims (45)

1 . An image sensor for sensing at least one of deep ultraviolet (DUV) radiation, vacuum ultraviolet (VUV) radiation, extreme ultraviolet (EUV) radiation, and charged particles, the image sensor comprising:

a monocrystalline silicon substrate having a first surface and an opposing second surface;

an epitaxial layer having a third surface forming an interface with the first surface of the monocrystalline silicon substrate, said epitaxial layer having a fourth surface disposed opposite to the third surface;

circuit elements and metal interconnects formed on the fourth surface of the epitaxial layer; and

a pure boron layer formed on the second surface of the monocrystalline silicon substrate,

wherein said monocrystalline silicon substrate and said epitaxial layer collectively includes a boron concentration gradient configured such that a concentration of boron atoms monotonically decreases from a highest boron concentration level occurring at the second surface of the monocrystalline silicon substrate to a lowest boron concentration level at the fourth surface of the epitaxial layer.

2 . The image sensor of claim 1 ,

wherein a thickness of the monocrystalline silicon substrate measured between the first and second surfaces is in the range of 5 nm to 100 nm,

wherein a thickness of the epitaxial layer measured between the third and fourth surfaces is in the range of 10 μm to 40 μm, and

wherein the pure boron layer has a thickness in the range of 2 nm to 20 nm.

3 . The image sensor of claim 1 , further comprising a handling wafer attached to the epitaxial layer over the circuit elements.

4 . The image sensor of claim 1 ,

wherein the pure boron layer has a thickness in the range of 3 nm to 10 nm, and

wherein the image sensor further comprises at least one anti-reflection coating layer disposed on the pure boron layer such that the pure boron layer is sandwiched between the anti-reflection coating layer and the monocrystalline silicon substrate.

5 . The image sensor of claim 4 , wherein the anti-reflection coating layer comprises silicon dioxide.

6 . The image sensor of claim 1 ,

wherein the pure boron layer has a thickness in the range of 3 nm to 10 nm, and

wherein the image sensor further comprises at least one of a protective coating layer and an anti-reflection coating layer disposed on surface of the pure boron layer that is opposite to the monocrystalline silicon substrate.

7 . The image sensor of claim 1 , wherein the highest boron concentration level of the boron concentration gradient is in a range of 10 18 cm −3 (i.e., 10 18 boron atoms per cubic centimeter) to 10 21 cm −3 , and

wherein the lowest boron concentration level of the boron concentration gradient is in a range of 10 13 cm −3 to 10 14 cm −3 .

8 . The image sensor of claim 1 , wherein a portion of the dopant concentration gradient generated within the silicon substrate is substantially flat such that an intermediate dopant level occurring at the third surface is substantially equal to the highest boron concentration level occurring at the second surface.

9 . The image sensor of claim 1 , wherein the circuit elements comprise at least one of charge-coupled device (CCD) sensor elements and complementary metal-oxide-semiconductor (CMOS) sensor elements.

10 . The image sensor of claim 1 , wherein the metal interconnects comprise at least one of aluminum (Al) and copper (Cu).

11 . The image sensor of claim 1 , further comprising a protective layer disposed over the interconnects.

12 . The image sensor of claim 11 , wherein the protective layer comprises silicon nitride.

13 . An image sensor for sensing at least one of deep ultraviolet (DUV) radiation, vacuum ultraviolet (VUV) radiation, extreme ultraviolet (EUV) radiation, and charged particles, the image sensor comprising:

an epitaxial layer having a third surface and a fourth surface disposed opposite to the third surface;

circuit elements and metal interconnects formed on the fourth surface of the epitaxial layer; and

a pure boron layer disposed over the third surface of the epitaxial layer such that the epitaxial layer is disposed between the pure boron layer and the circuit elements,

wherein the epitaxial layer includes a boron concentration gradient configured such that a concentration of boron atoms monotonically decreases from a highest boron concentration level occurring at the third surface of the epitaxial layer to a lowest boron concentration level at the fourth surface of the epitaxial layer.

14 . The image sensor of claim 13 ,

wherein a thickness of the epitaxial layer measured between the third and fourth surfaces is in the range of 10 μm to 40 μm, and

wherein the pure boron layer has a thickness in the range of 2 nm to 20 nm.

15 . The image sensor of claim 13 , further comprising a handling wafer attached to the epitaxial layer over the circuit elements.

16 . The image sensor of claim 13 ,

wherein the pure boron layer has a thickness in the range of 3 nm to 10 nm, and

wherein the image sensor further comprises at least one anti-reflection coating layer disposed on the pure boron layer such that the pure boron layer is sandwiched between the anti-reflection coating layer and the monocrystalline silicon substrate.

17 . The image sensor of claim 13 ,

wherein the pure boron layer has a thickness in the range of 3 nm to 10 nm, and

wherein the image sensor further comprises at least one of a protective coating layer and an anti-reflection coating layer disposed on a lower surface of the pure boron layer.

18 . The image sensor of claim 13 ,

wherein the highest boron concentration level of the boron concentration gradient is in a range of 10 18 cm −3 (i.e., 10 18 boron atoms per cubic centimeter) to 10 21 cm −3 , and

wherein the lowest boron concentration level of the boron concentration gradient is in a range of 10 13 cm −3 to 10 14 cm −3 .

19 . The image sensor of claim 13 , wherein the circuit elements comprise at least one of charge-coupled device (CCD) sensor elements and complementary metal-oxide-semiconductor (CMOS) sensor elements.

20 . The image sensor of claim 13 , wherein the metal interconnects comprise at least one of aluminum (Al) and copper (Cu).