Image sensor including vertical gate electrode at center of pixel region and charge pocket region under vertical gate electrode
An image sensor includes a semiconductor substrate including a pixel region; a vertical gate electrode disposed in the semiconductor substrate at a center of the pixel region; a charge pocket region provided under the vertical gate electrode in the semiconductor substrate, and doped with a first impurity having a first conductivity type; a first impurity region which is spaced apart from the charge pocket region in a vertical direction, doped with a second impurity having a second conductivity type, and surrounded by the vertical gate electrode; and a second impurity region which is provided around the vertical gate electrode and doped with the second impurity.
1 . An image sensor comprising:
a semiconductor substrate comprising a pixel region;
a vertical gate electrode disposed in the semiconductor substrate at a center of the pixel region;
a charge pocket region provided under the vertical gate electrode in the semiconductor substrate, and doped with a first impurity having a first conductivity type;
a first impurity region which is spaced apart from the charge pocket region in a vertical direction, doped with a second impurity having a second conductivity type, and surrounded by the vertical gate electrode; and
a second impurity region which is provided around the vertical gate electrode and doped with the second impurity,
wherein the vertical gate electrode has a closed loop shape and surrounds the first impurity region when viewed in a plan view.
2 . The image sensor of claim 1 , wherein a width of the charge pocket region is smaller than a width of the vertical gate electrode.
3 . The image sensor of claim 1 , further comprising a channel impurity region which is provided along a bottom surface of the vertical gate electrode and a side surface of the vertical gate electrode, and disposed between the first impurity region and the second impurity region,
wherein the channel impurity region is doped with the second impurity.
4 . The image sensor of claim 1 , further comprising a charge collection region which is provided around the charge pocket region and doped with the first impurity,
wherein a concentration of the first impurity in the charge collection region is lower than a concentration of the first impurity in the charge pocket region.
5 . The image sensor of claim 1 , wherein the second impurity region surrounds the vertical gate electrode from a perspective of the plan view.
6 . The image sensor of claim 1 , further comprising:
a reset gate electrode which is spaced apart from the vertical gate electrode from a perspective of the plan view and disposed in the semiconductor substrate; and
a reset drain impurity region which is spaced apart from the second impurity region, doped with the first impurity in the semiconductor substrate, and disposed at one side of the reset gate electrode.
7 . The image sensor of claim 6 , wherein the charge pocket region extends from a first location underneath the vertical gate electrode to a second location underneath the reset gate electrode.
8 . The image sensor of claim 1 , further comprising a pixel isolation structure which passes through the semiconductor substrate in the vertical direction and defines the pixel region,
wherein the pixel isolation structure surrounds the pixel region from a perspective of the plan view, and
wherein the pixel isolation structure comprises a conductive pattern which passes through the semiconductor substrate in the vertical direction, and a liner insulating pattern interposed between the conductive pattern and the semiconductor substrate.