IP Library Granted Patent US 12696586
Granted Patent B2
US 12696586 · App. 18/041,269 · Granted Jul 28, 2026

Activation of p-type layers of tunnel junctions

Inventors: Panpan Li (Goleta, CA); Hongjian Li (Goleta, CA); Michael Iza (Goleta, CA); Shuji Nakamura (Santa Barbara, CA); Steven P. DenBaars (Goleta, CA)
Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
H10H20/825H10H20/01335H10H20/813H10H20/82H10H29/142H10W90/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12696586
App. No.
18/041,269
Granted
Jul 28, 2026
Kind
B2
Abstract

A method to fabricate micro-size III-nitride light emitting diodes (μLEDs) with an epitaxial tunnel junction comprised of a p+GaN layer, an In x Al y Ga z N insertion layer, and an n+GaN layer, grown using metalorganic chemical vapor deposition (MOCVD), wherein the μLEDs have a low forward voltage. The In x Al y Ga z N insertion layer has a smaller energy bandgap than the GaN layers, which reduces a depletion width of the tunnel junction and increases the tunneling probability. The μLEDs are fabricated with dimensions that vary from 25 to 10,000 μm 2 . It was found that the In x Al y Ga z N insertion layer can reduce the forward voltage at 20 A/cm 2 by at least 0.6 V. The tunnel junction μLEDs with an n-type and p-type In x Al y Ga z N insertion layer had a low forward voltage at 20 A/cm 2 that was very stable. At dimensions smaller than 1600 μm 2 , the low forward voltage is less than 3.2 V.

Claims (31)

1 . A method, comprising:

fabricating a III-nitride light emitting diode (LED) structure, wherein:

the III-nitride LED structure includes at least one tunnel junction (TJ) comprised of a p-type III-nitride layer; an n-type III-nitride tunnel junction layer; and an In x Al y Ga z N insertion layer between the p-type III-nitride layer and the n-type III-nitride tunnel junction layer, where 0<x≤1, 0≤y<1, 0≤z≤1, and x+y+z=1; and

the p-type III-nitride layer is activated by removing hydrogen through access points in the n-type III-nitride tunnel junction layer and the In x Al y Ga z N insertion layer that exposes a top surface of the p-type III-nitride layer.

2 . The method of claim 1 , wherein the p-type III-nitride layer and n-type III-nitride tunnel junction layer are comprised of GaN, and the In x Al y Ga z N insertion layer has a lower energy bandgap than the GaN.

3 . The method of claim 1 , wherein the In x Al y Ga z N insertion layer and the n-type III-nitride tunnel junction layer are grown by metalorganic chemical vapor deposition (MOCVD).

4 . The method of claim 1 , wherein the In x Al y Ga z N insertion layer is n-type doped with a donor concentration >1×10 19 cm −3 .

5 . The method of claim 4 , wherein the donor is silicon (Si) or germanium (Ge).

6 . The method of claim 1 , wherein the In x Al y Ga z N insertion layer is p-type doped with a donor concentration >1×10 19 cm −3 .

7 . The method of claim 6 , wherein the donor is magnesium (Mg) or Zinc (Zn).

8 . The method of claim 1 , wherein the p-type III-nitride layer is activated by removing hydrogen through sidewalls of a mesa.

9 . The method of claim 1 , wherein the p-type III-nitride layer is activated by thermal annealing.

10 . The method of claim 1 , wherein selective area growth (SAG) or epitaxial lateral overgrowth (ELOG) is used to make the access points in the n-type III-nitride tunnel junction layer and the In x Al y Ga z N insertion layer.

11 . The method of claim 8 , wherein inductively coupled plasma (ICP) or reactive ion etching (RIE) etching is used to expose the sidewalls of the mesa to access the p-type III-nitride layer.

12 . The method of claim 1 , wherein the III-nitride LED structure comprises a micro-LED with an area less than 10,000 μm 2 .

13 . The method of claim 12 , wherein the III-nitride LED structure has a forward voltage less than 3.45 V at a current density of 20 A/cm 2 .

14 . The method of claim 1 , wherein the n-type III-nitride tunnel junction layer is an n-type GaN layer that contains some indium.

15 . The method of claim 1 , wherein the p-type III-nitride layer is a p-type GaN layer that contains some indium.

16 . A device, comprising:

a III-nitride light emitting diode (LED) structure, wherein:

the III-nitride LED structure includes at least one tunnel junction (TJ) comprised of a p-type III-nitride layer, an n-type III-nitride tunnel junction layer, and an In x Al y Ga z N insertion layer between the p-type III-nitride layer and the n-type III-nitride tunnel junction layer; and

the n-type III-nitride tunnel junction layer and the In x Al y Ga z N insertion layer have one or more access points therein to expose a top surface of the p-type III-nitride layer for removing hydrogen to activate the p-type III-nitride layer.

17 . A device, comprising:

a micro-size III-nitride light emitting diode (LED) comprised of a p-type III-nitride layer, an n-type III-nitride tunnel junction layer, and an In x Al y Ga z N insertion layer between the p-type III-nitride layer and the n-type III-nitride tunnel junction layer, where 0<x≤1, 0≤y<1, 0≤z≤1, and x+y+z=1; and

the p-type III-nitride layer is activated by removing hydrogen through one or more access points in the n-type III-nitride tunnel junction layer and the In x Al y Ga z N insertion layer that expose a top surface of a p-type III-nitride layer.

18 . A device, comprising:

a micro-size III-nitride light emitting diode (LED) with an epitaxial tunnel junction comprised of p+GaN and n+GaN layers with an In x Al y Ga z N insertion layer between the p+GaN and n+GaN layers, where 0<x≤1, 0≤y<1, 0≤z≤1, and x+y+z=1;

the p+GaN layer is activated by removing hydrogen through access points in the n+GaN layer and the In x Al y Ga z N insertion layer that expose a top surface of the p+GaN layer; and

the micro-size III-nitride light emitting diode (LED) having a low forward voltage less than 3.45 V at a current density of 20 A/cm 2 .

19 . The device of claim 18 , wherein the micro-size III-nitride LED has dimensions ranging from 25 to 10,000 μm 2 .

20 . The device of claim 18 , wherein the micro-size III-nitride LED has a size-independent forward voltage at 20 A cm −2 that is stable and uniform around 3.08 V to 3.3V.