Mounting arrangements for semiconductor packages and related methods
Semiconductor packages and more particularly mounting arrangements for semiconductor packages and related methods are disclosed. Mounting arrangements include metal pads on substrates and selectively placed solder material on various portions of the metal pads. Semiconductor packages may be initially positioned on the solder material and on portions of the metal pads. During solder reflow, the solder material may spread along portions of the metal pads that were previously uncovered by the solder material and effectively move the semiconductor packages. Specific arrangements of metal pad and selective solder material patterns may be provided that control directions of such movements during reflow. Resulting mounting positions of semiconductor packages may be provided with spacings that are closer than limits of pick and place equipment used to initially position the semiconductor packages.
1 . A method comprising:
providing a substrate with a first metal pad and a second metal pad;
selectively applying a solder material to at least two discrete portions of the first metal pad and a portion of the second metal pad;
mounting a first semiconductor package offset relative to the solder material located at the at least two discrete portions of the first metal pad such that the first semiconductor package laterally overhangs the solder material, and mounting a second semiconductor package offset relative to the solder material of the second metal pad such that the second semiconductor package laterally overhangs the solder material, wherein the second semiconductor package is laterally spaced from the first semiconductor package by a first distance; and
reflowing the solder material such that the solder material on the at least two discrete portions of the first metal pad spreads and joins together along the first metal pad and the solder material of the second metal pad spreads along the second metal pad such that the first semiconductor package is laterally spaced from the second semiconductor package by a second distance that is less than the first distance.
2 . The method of claim 1 , wherein the first semiconductor package and the second semiconductor package comprise light-emitting diode (LED) packages.
3 . The method of claim 2 , wherein the LED packages are configured as surface mount technology (SMT) packages.
4 . The method of claim 1 , wherein the first semiconductor package and the second semiconductor package comprise at least one of a capacitor, a resistor, a transistor, and a microchip.
5 . The method of claim 1 , wherein the second distance is less than or equal to 100 microns (μm).
6 . The method of claim 1 , wherein the second distance is less than or equal to 50 microns (μm).
7 . The method of claim 1 , wherein at least a portion of the first semiconductor package is in contact with at least a portion of the second semiconductor package.
8 . The method of claim 1 , further comprising a third semiconductor package and a fourth semiconductor package, wherein a corner of the first semiconductor package is within 100 microns (μm) of a corner of each of the second, third, and fourth semiconductor packages.
9 . The method of claim 1 , wherein the first metal pad comprises a finger extension along the substrate and a least a portion of the solder material is selectively applied to the finger extension before reflowing of the solder material.
10 . A method comprising:
providing a substrate with a metal pad;
selectively applying a solder material to a first portion of the metal pad and a second portion of the metal pad, wherein the solder material forms at least two discrete regions on the first portion of the metal pad;
mounting a first semiconductor package offset relative to the at least two discrete regions of the solder material on the first portion of the metal pad such that the first semiconductor package laterally overhangs the solder material, and mounting a second semiconductor package offset relative to the solder material on the second portion of the metal pad such that the second semiconductor package laterally overhangs the solder material, wherein the second semiconductor package is laterally spaced from the first semiconductor package by a first distance; and
reflowing the solder material such that the solder material at the first portion of the metal pad and the solder material at the second portion of the metal pad spread toward one another along the metal pad such that the first semiconductor package is laterally spaced from the second semiconductor package by a second distance that is less than the first distance, and the at least two discrete regions of the solder material on the first portion of the metal pad join together.
11 . The method of claim 10 , wherein the first semiconductor package and the second semiconductor package comprise light-emitting diode (LED) packages.
12 . The method of claim 10 , wherein the first semiconductor package and the second semiconductor package comprise at least one of a capacitor, a resistor, a transistor, and a microchip.
13 . The method of claim 10 , wherein the second distance is less than or equal to 100 microns (μm).
14 . The method of claim 10 , wherein the second distance is less than or equal to 50 microns (μm).
15 . The method of claim 10 , wherein at least a portion of the first semiconductor package is in contact with at least a portion of the second semiconductor package.
16 . The method of claim 10 , further comprising a third semiconductor package and a fourth semiconductor package, wherein a corner of the first semiconductor package is within 100 microns (μm) of a corner of each of the second, third, and fourth semiconductor packages on the metal pad.
17 . The method of claim 10 , wherein the metal pad comprises a plurality of finger extensions along the substrate and a least a portion of the solder material is selectively applied to the plurality of finger extensions before reflowing of the solder material.