IP Library Granted Patent US 12696628
Granted Patent B2
US 12696628 · App. 18/519,369 · Granted Jul 28, 2026

Display device and manufacturing method thereof

Inventors: Hyun Eok Shin (Yongin-si, KR); Dong Min Lee (Yongin-si, KR); Woo-Seok Jeon (Yongin-si, KR); Yung Bin Chung (Yongin-si, KR); Yu-Gwang Jeong (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/122H10K59/1201H10K59/80522
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12696628
App. No.
18/519,369
Granted
Jul 28, 2026
Kind
B2
Abstract

A display device includes a plurality of transistors disposed on a substrate, an insulating layer disposed on the transistors, a first electrode disposed on the insulating layer and electrically connected to the transistors, a partition wall disposed on the insulating layer, a common layer disposed on the partition wall and the first electrode, an emission layer disposed on the common layer, a second electrode disposed on the emission layer, and an auxiliary layer disposed on the second electrode. The partition wall includes a groove, and an inner width of the groove is greater than an inlet width of the groove.

Claims (43)

1 . A display device comprising:

a plurality of transistors disposed on a substrate;

an insulating layer disposed on the plurality of transistors;

a first electrode disposed on the insulating layer and electrically connected to the plurality of transistors;

a partition wall disposed on the insulating layer;

a common layer disposed on the partition wall and the first electrode;

an emission layer disposed on the common layer;

a second electrode disposed on the emission layer;

an auxiliary layer disposed on the second electrode; wherein

the partition wall includes a groove, and

an inner width of the groove is greater than an inlet width of the groove.

2 . The display device of claim 1 , wherein a thickness of the auxiliary layer is in a range of about 30 Å to about 200 Å.

3 . The display device of claim 1 , wherein a thickness of the auxiliary layer is uniform.

4 . The display device of claim 1 , wherein the auxiliary layer includes titanium nitride (TiN).

5 . The display device of claim 1 , wherein

the auxiliary layer includes a metal, and

a thickness of the auxiliary layer is equal to or less than about 50 Å.

6 . The display device of claim 5 , wherein the auxiliary layer includes at least one of W, Mo, Ta, Ti, and Al.

7 . The display device of claim 1 , wherein the auxiliary layer includes at least one of an indium tin oxide (ITO), an indium zinc oxide (IZO), a zinc tin oxide (ZTO), a copper indium oxide (CIO), a copper zinc oxide (CZO), a gallium zinc oxide (GZO), an aluminum zinc oxide (AZO), a tin oxide (SnO 2 ), a zinc oxide (ZnO), and an indium gallium zinc oxide (IGZO).

8 . The display device of claim 1 , wherein a width of an inside of the groove is greater than or equal to about 1.5 times of a width of an inlet of the groove.

9 . The display device of claim 1 , wherein a width of an inlet of the groove is in a range of about 0.5 μm to about 3 μm.

10 . The display device of claim 1 , wherein the partition wall includes an inorganic material.

11 . The display device of claim 1 , wherein the common layer is disposed in the groove.

12 . The display device of claim 1 , wherein the common layer disposed on the first electrode is separated by the groove.

13 . The display device of claim 1 , wherein the common layer is a hole injection layer.

14 . The display device of claim 1 , wherein the emission layer blocks an inlet of the groove.

15 . The display device of claim 1 , wherein the emission layer is disposed in the groove.

16 . The display device of claim 1 , wherein a height of the groove is greater than a thickness of the common layer and less than a thickness of the emission layer.

17 . A manufacturing method of a display device, comprising:

preparing a substrate including a plurality of transistors and a first electrode connected to the plurality of transistors;

forming a metal pattern on the substrate;

forming a partition wall on the metal pattern;

patterning the partition wall to form an opening overlapping the metal pattern in a plan view;

forming a groove in the partition wall by etching the metal pattern;

forming a common layer on the partition wall and the first electrode;

forming an emission layer on the common layer;

forming a second electrode on the emission layer; and

forming an auxiliary layer on the second electrode,

wherein the forming of the auxiliary layer is performed by an atomic layer deposition method.

18 . The manufacturing method of claim 17 , wherein a thickness of the auxiliary layer is in a range of about 30 Å to about 200 Å.

19 . The manufacturing method of claim 17 , wherein the auxiliary layer includes at least one of TiN, W, Mo, Ta, Ti, Al, an indium tin oxide (ITO), an indium zinc oxide (IZO), a zinc tin oxide (ZTO), a copper indium oxide (CIO), a copper zinc oxide (CZO), a gallium zinc oxide (GZO), an aluminum zinc oxide (AZO), a tin oxide (SnO 2 ), a zinc oxide (ZnO), and an indium gallium zinc oxide (IGZO).

20 . The manufacturing method of claim 17 , wherein

the common layer is disposed in the groove.