IP Library Granted Patent US 12696691
Granted Patent B2
US 12696691 · App. 18/335,026 · Granted Jul 28, 2026

Resistive random-access memory (RRAM) devices with interface layers

Inventors: Minxian Zhang (Amherst, MA); Ning Ge (Danville, CA)
Assignee: TetraMem Inc.
H10N70/8833H10B63/30H10B63/80H10N70/023H10N70/026H10N70/841
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Quick Facts
Patent No.
US 12696691
App. No.
18/335,026
Granted
Jul 28, 2026
Kind
B2
Abstract

The present disclosure relates to resistive random-access memory (RRAM) devices. An RRAM device may include a first electrode, an interface layer fabricated on the first electrode, a switching oxide layer comprising at least one transition metal oxide; and a second electrode fabricated on the switching oxide layer. The interface layer may include a discontinuous layer of a dielectric material and a conductive material deposited in the discontinuous layer of the dielectric material. The interface layer is positioned between the first electrode and the switching oxide layer. The dielectric material may be and/or include Al 2 O 3 , SiO 2 , Si 3 N 4 , MgO, Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , La 2 O 3 , etc. The conductive material may include a metal, a conductive oxide, a conductive nitride, etc.

Claims (30)

1 . An apparatus, comprising:

a resistive random-access memory (RRAM) device, comprising:

a first electrode;

a first interface layer fabricated on the first electrode, wherein the first interface layer comprises a discontinuous layer of a first dielectric material and a conductive material deposited in the discontinuous layer of the first dielectric material;

a switching oxide layer fabricated on the first interface layer, the switching oxide layer comprising at least one transition metal oxide; and

a second electrode fabricated on the switching oxide layer.

2 . The apparatus of claim 1 , wherein the first dielectric material comprises at least one of Al 2 O 3 , SiO 2 , Si 3 N 4 , MgO, Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , or La 2 O 3 .

3 . The apparatus of claim 1 , wherein the conductive material comprises a metal.

4 . The apparatus of claim 1 , wherein the conductive material comprises a conductive oxide.

5 . The apparatus of claim 1 , wherein the conductive material comprises a conductive nitride.

6 . The apparatus of claim 1 , wherein the discontinuous layer of the dielectric material comprises a plurality of islands of the first dielectric material, and wherein the conductive material is deposited between the plurality of islands of the first dielectric material.

7 . The apparatus of claim 1 , further comprising a second interface layer fabricated between the switching oxide layer and the second electrode, wherein the second interface layer comprises a discontinuous layer of a second dielectric material.

8 . The apparatus of claim 7 , wherein the second dielectric material comprises at least one of Al 2 O 3 , SiO 2 , Si 3 N 4 , MgO, Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , or La 2 O 3 .

9 . The apparatus of claim 1 , wherein the transition metal oxide comprises at least one of HfO x or TaO y , wherein x≤2.0, and wherein y≤2.5.

10 . The apparatus of claim 1 , wherein the switching oxide layer comprises:

a first base oxide layer comprising the at least one transition metal oxide; and

a first geometric confining layer fabricated on the first base oxide layer, wherein the first geometric confining layer comprises a first plurality of pin-holes.

11 . The apparatus of claim 10 , wherein the switching oxide layer further comprises a second base oxide layer fabricated on the first geometric confining layer.

12 . The apparatus of claim 11 , wherein the second base oxide layer comprises at least one of TaO x , HfO x , TiO x , or ZrO x .

13 . The apparatus of claim 11 , wherein the switching oxide layer comprises a second geometric confining layer comprises a second plurality of pin-holes.

14 . A method for fabricating a resistive random-access memory (RRAM) device, comprising:

fabricating a first interface layer on a first electrode, wherein the first interface layer comprises a discontinuous layer of a first dielectric material and a conductive material deposited in the discontinuous layer of the first dielectric material;

fabricating, on the first interface layer, a switching oxide layer comprising at least one transition metal oxide; and

fabricating a second electrode on the switching oxide layer.

15 . The method of claim 14 , wherein the first dielectric material comprises at least one of Al 2 O 3 , SiO 2 , Si 3 N 4 , MgO, Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , or La 2 O 3 .

16 . The method of claim 14 , wherein fabricating the first interface layer comprises depositing the first dielectric material and the conductive material using at least one of an atomic layer deposition technique or a co-sputter deposition technique.

17 . The method of claim 14 , wherein the conductive material comprises at least one of a metal, a conductive oxide, or a conductive nitride.

18 . The method of claim 14 , further comprising fabricating a second interface layer on the switching oxide layer, wherein the second interface layer comprises a discontinuous layer of a second dielectric material, and wherein the second electrode is fabricated on the second interface layer.

19 . The method of claim 18 , wherein the second dielectric material comprises at least one of Al 2 O 3 , SiO 2 , Si 3 N 4 , MgO, Y 2 O 3 , Gd 2 O 3 , Sm 2 O 3 , CeO 2 , Er 2 O 3 , or La 2 O 3 .

20 . The method of claim 14 , wherein the transition metal oxide comprises at least one of HfO x or TaO y , wherein x≤2.0, and wherein y≤2.5.