Type of bumpless and wireless semiconductor device
According to a first aspect of the present invention there is provided a semiconductor device comprising: a die having a central active region, a top surface, a bottom surface, and sidewalls having a plurality of perforations therein, each perforation extending from a top end at the top surface to a bottom end at the bottom surface; a plurality of die pads on the top surface and extending from the central active region to respective top ends; a patterned back-side-metallization layer on the bottom surface, comprising a plurality of electrically isolated regions extending to respective bottom ends; metal coating partially filling the perforations and providing electrical connection between respective ones of the plurality of die pads and respective ones of the plurality of electrically isolated regions; and a passivation layer covering the top surface and the die pads.
1 . A semiconductor device comprising:
a die having a central active region,
a top surface,
a bottom surface,
and sidewalls having a plurality of perforations therein, each perforation extending from a top end at the top surface to a bottom end at the bottom surface;
a plurality of die pads on the top surface and extending from the central active region to respective top ends;
a patterned back-side-metallization layer on the bottom surface, comprising a plurality of electrically isolated regions extending to respective bottom ends;
metal coating partially filling the perforations and providing electrical connection between respective ones of the plurality of die pads and respective ones of the plurality of electrically isolated regions; and
a passivation layer covering the top surface and the die pads.
2 . The semiconductor device of claim 1 , comprising four sidewalls each of which have perforations therein.
3 . The semiconductor device of claim 1 , wherein a cross-section of the perforations is a one of semi-circular, rectangular with a 2:1 aspect ratio, semi-slotted, rectangular, semi-oval, or a segment of a circle.
4 . The semiconductor device of claim 2 , wherein the cross-section of the perforations is semi-circular and a diameter of the semi-circular perforations is 50-100 um.
5 . The semiconductor device of claim 2 , wherein the cross-section of the perforations is semi-slotted and a long diameter of the semi-slotted perforations is 150-250 um.
6 . The semiconductor device of claim 1 , wherein the patterned back-side-metallization layer further comprises an electrically isolated central region.
7 . The semiconductor device of claim 6 , wherein a cross-section of the electrically isolated central region is one of square, rectangular, circular.
8 . The semiconductor device of claim 1 , wherein a distance between two adjacent perforations is 0.3-0.5 mm.
9 . The semiconductor device of claim 1 , wherein the electrically isolated regions of the patterned back-side-metallization layers have a width along the sidewall, of 0.15-0.25 mm and a length 0.35-0.55 mm.
10 . The semiconductor device of claim 1 , wherein the patterned back-side-metallization layer comprises an alloy including at least one of following elements: Au, Ag, Cu, Al, Ni.