Method of making semiconductor device having reduced bump height variation
A method of making a semiconductor device includes patterning a photoresist on a substrate to form a plurality of openings. A first opening has a first width, a second opening has a second width, smaller than the first width, and a third opening is between the first opening and the second opening and has a third width, different from the first width and the second width. The width is measured in a direction parallel to a top surface of the substrate. The method further includes plating a first conductive material into each opening of the plurality of openings in the photoresist. Plating the first conductive material includes plating of the first conductive material to a first height in the first opening, plating the first conductive material to a second height in the second opening, and plating the first conductive material to a third height in the third opening.
1 . A method of making a semiconductor device, the method comprising:
patterning a photoresist on a substrate, wherein patterning the photoresist comprises forming a plurality of openings in the photoresist, a first opening of the plurality of openings has a first width, a second opening of the plurality of openings has a second width smaller than the first width, a third opening of the plurality of openings is between the first opening and the second opening and has a third width different from the first width and the second width, and width is measured in a direction parallel to a top surface of the substrate; and
plating a first conductive material into each opening of the plurality of openings in the photoresist, wherein plating the first conductive material comprises:
plating of the first conductive material to a first height in the first opening,
plating the first conductive material to a second height in the second opening, and
plating the first conductive material to a third height in the third opening, wherein the third height is different from the first height and the second height.
2 . The method of claim 1 , wherein the third width is less than the first width.
3 . The method of claim 1 , wherein the third width is greater than the second width.
4 . The method of claim 1 , wherein patterning the photoresist comprises forming the third openings for dummy bumps.
5 . The method of claim 1 , wherein the first height is equal to the second height.
6 . The method of claim 1 , further comprising bonding the first conductive material to a package substrate.
7 . The method of claim 6 , wherein bonding the first conductive material to the package substrate comprises bonding the first conductive material to the package substrate using solder.
8 . The method of claim 6 , wherein bonding the first conductive material to the package substrate comprises bonding the first conductive material to one or more conductive pillars on the package substrate.
9 . The method of claim 6 , wherein bonding the first conductive material to the package substrate comprises bonding the first conductive material to one or more conductive traces on the package substrate.
10 . The method of claim 6 , further comprising filling a space between the substrate and the package structure with an underfill material, wherein the underfill material is between adjacent pieces of the first conductive material.
11 . A method of making a semiconductor device, the method comprising:
forming a first plurality of bump structures on a substrate, wherein each of the first plurality of bump structures has a first width and a first height;
forming a second plurality of bump structures on the substrate, wherein each of the second plurality of bump structures has a second width and the first height, the second width is less than the first width, and the second plurality of bump structures surrounds the first plurality of bump structures; and
bonding a package substrate to the first plurality of bump structures and the second plurality of bump structures, wherein a distance between a surface of the package substrate and a closest surface of each of the first plurality of bump structures is a first distance, a distance between the surface of the package substrate and a closest surface of each of the second plurality of bump structures is the first distance, and bonding the package substrate to the first plurality of bump structures and the second plurality of bump structures comprises bonding at least one of the first plurality of bump structures to a bump structure on the package substrate.
12 . The method of claim 11 , further comprising forming a plurality of third bump structures on the substrate, wherein the plurality of third bump structures is between the plurality of first bump structures and the plurality of second bump structures.
13 . The method of claim 12 , wherein forming the plurality of third bump structures comprises forming each of the plurality of third bump structures having a third width different from the first width and the second width.
14 . The method of claim 13 , wherein the third width is less than the first width.
15 . The method of claim 13 , wherein the third width is greater than the second width.
16 . The method of claim 12 , wherein forming the plurality of third bump structures comprises forming each of the plurality of third bump structures as a dummy bump structure.
17 . The method of claim 11 , wherein bonding the package substrate to the first plurality of bump structures and the second plurality of bump structures comprises bonding each of the first plurality of bump structures to a corresponding bump structure on the package substrate.
18 . The method of claim 11 , wherein bonding the package substrate to the first plurality of bump structures and the second plurality of bump structures comprises bonding at least one of the first plurality of bump structures directly to a conductive trace on the package substrate.
19 . A method of making a semiconductor device, the method comprising:
forming a first plurality of bump structures on a substrate, wherein each of the first plurality of bump structures has a first width;
depositing a first solder layer on each of the first plurality of bump structures, wherein a combined height of the first solder layer and a corresponding bump structure of the first plurality of bump structures is a first height;
forming a second plurality of bump structures on the substrate, wherein each of the second plurality of bump structures has a second width, the second width is less than the first width, and the second plurality of bump structures surrounds the first plurality of bump structures;
depositing a second solder layer on each of the second plurality of bump structures, wherein a combined height of the second solder layer and a corresponding bump structure of the second plurality of bump structures is the first height; and
bonding a package substrate to the first plurality of bump structures and the second plurality of bump structures, wherein bonding the package substrate to the first plurality of bump structures comprises bonding using the first solder layer, bonding the package substrate to the second plurality of bump structures comprises bonding using the second solder layer, wherein at least one of the first plurality of bump structures is physically between the package substrate and a surface of the substrate closest to the package substrate.
20 . The method of claim 19 , further comprising forming a plurality of third bump structures on the substrate, wherein the plurality of third bump structures is between the plurality of first bump structures and the plurality of second bump structures, and each of the plurality of third bump structures has a third width different from the first width and the second width.