IP Library Granted Patent US 12696785
Granted Patent B2
US 12696785 · App. 18/276,787 · Granted Jul 28, 2026

Heterogeneous solder bump structure

Inventors: Abderrahim El Amrani (Sherbrooke, CA); Etienne Paradis (Sherbrooke, CA); David Danovitch (Sherbrooke, CA); Dominique Drouin (Sherbrooke, CA); Valerie Oberson (Markham, CA); Michel Turgeon (Markham, CA); Clement Fortin (Markham, CA)
Assignee: SOCIETE DE COMMERCIALISATION DES PRODUITS DE LA RECHERCHE APPLIQUÉE SOCPRA SCIENCES ET GÉNIE S.E.C.
H10W72/20H10W72/012H10W72/01235H10W72/01257H10W72/221H10W72/222H10W72/232H10W72/252H10W90/724
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Quick Facts
Patent No.
US 12696785
App. No.
18/276,787
Granted
Jul 28, 2026
Kind
B2
Abstract

There is provided a solder bump structure comprising an under bump metallurgy (UBM) layer, a first solder portion over the UBM layer, the first solder portion having a first composition, a barrier layer encapsulating the first solder portion, and a second solder portion over the barrier layer, the second solder portion having a second composition different from the first composition.

Claims (27)

1 . A solder bump structure comprising:

an under bump metallurgy (UBM) layer;

a first solder portion over the UBM layer, the first solder portion having a first composition;

a barrier layer encapsulating the first solder portion; and

a second solder portion over the barrier layer, the second solder portion having a second composition different from the first composition,

wherein the barrier layer is configured to limit diffusion of material between the first solder portion and the second solder portion during multiple reflowing of the bump structure, and further wherein at least part of the barrier layer is configured to break down, following post-underfill reflowing of the bump structure, to cause diffusion of material between the first solder portion and the second solder portion to homogenize an overall composition of the bump structure.

2 . The bump structure of claim 1 , wherein the first solder portion has an upper surface, at least one side surface, and a lower surface positioned over the UBM layer, the barrier layer encapsulating at least part of the upper surface and the at least one side surface of the first solder portion.

3 . The bump structure of claim 1 , wherein the second solder portion exhibits a substantially hemispherical shape after a first reflowing of the bump structure.

4 . The bump structure of claim 3 , wherein the barrier layer restrains the first solder portion to a substantially cylindrical shape during multiple reflowing of the bump structure.

5 . The bump structure of claim 1 , wherein a portion of the UBM layer, the first solder portion, the barrier layer, and the second solder portion are formed by sequential electroplating.

6 . The bump structure of claim 5 , wherein the first solder portion comprises a first solder layer electroplated over the UBM layer, and the second solder portion comprises at least one second solder layer electroplated over the barrier layer.

7 . The bump structure of claim 6 , wherein each of the first layer and the at least one second layer is a tin (Sn) layer.

8 . The bump structure of claim 1 , wherein the barrier layer comprises a layer of nickel (Ni).

9 . The bump structure of claim 7 , wherein the second solder portion further comprises a silver (Ag) layer electroplated over the at least one second solder layer, the silver layer configured to diffuse into the tin layer after a first reflowing of the bump structure to cause the first solder layer to have a first silver content and the second solder portion to have a second silver content greater than the first silver content.

10 . The bump structure of claim 9 , wherein the first silver content of the first solder portion is lower than 1 wt % and the second silver content of the second solder portion is greater than 3 wt %.

11 . The bump structure of claim 1 , wherein the UBM layer is configured to be deposited over an integrated circuit (IC) chip and the second solder portion is configured to form a solder joint with a substrate for interconnecting the IC chip and the substrate and forming a flip-chip assembly.

12 . A method for manufacturing a solder bump structure, the method comprising:

depositing an under bump metallurgy (UBM) layer over an integrated circuit (IC) chip;

depositing a first solder layer over the UBM layer, the first solder layer having a first composition;

depositing a barrier layer that encapsulates the first solder layer;

depositing at least one second solder layer over the barrier layer, the at least one second solder layer having a second composition different from the first composition; and

performing a post-underfill reflow of the bump structure to break down at least part of the barrier layer and cause diffusion of material between the first solder layer and the at least one second solder layer for homogenizing an overall composition of the bump structure.

13 . The method of claim 12 , wherein the barrier layer is deposited to encapsulate at least part of an upper surface and at least one side surface of the first solder layer.

14 . The method of claim 12 , wherein a portion of the UBM layer, the first solder layer, the barrier layer, and the at least one second solder layer are deposited using a sequential electroplating process.

15 . The method of claim 14 , wherein depositing the first solder layer comprises electroplating a tin (Sn) layer over the UBM layer, and depositing the at least one second solder layer comprises electroplating at least one tin layer over the barrier layer, and further wherein depositing the at least one second solder layer further comprises electroplating a silver (Ag) layer over the at least one tin layer electroplated over the barrier layer, the silver layer configured to diffuse into the at least one tin layer after a first reflowing of the bump structure to cause the first solder layer to have a first silver content and the at least one second solder layer to have a second silver content greater than the first silver content.

16 . The method of claim 12 , wherein depositing the barrier layer comprises electroplating a layer of nickel (Ni) over the first solder layer.

17 . The method of claim 13 , wherein depositing the barrier layer comprises creating a gap between the at least one side surface of the first solder layer and a photoresist, and infiltrating the gap with a barrier layer material comprising a nickel (Ni) electrolyte.