IP Library Granted Patent US 12696798
Granted Patent B2
US 12696798 · App. 17/344,348 · Granted Jul 28, 2026

Active device layer at interconnect interfaces

Inventors: Han Wui Then (Portland, OR); Adel A. Elsherbini (Tempe, AZ); Kimin Jun (Portland, OR); Johanna M. Swan (Scottsdale, AZ); Shawna M. Liff (Scottsdale, AZ); Sathya Narasimman Tiagaraj (San Jose, CA); Gerald S. Pasdast (San Jose, CA); Aleksandar Aleksov (Chandler, AZ); Feras Eid (Chandler, AZ)
Assignee: Intel Corporation
H10W90/00H10W72/0198H10P90/1914H10W10/181H10W20/20H10W20/43H10W20/4441H10W72/823H10W90/297H10W90/722H10W90/732H10W90/792H10W99/00
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Quick Facts
Patent No.
US 12696798
App. No.
17/344,348
Granted
Jul 28, 2026
Kind
B2
Abstract

A die assembly comprising: a first component layer having conductive through-connections in an insulator, a second component layer comprising a die, and an active device layer (ADL) at an interface between the first component layer and the second component layer. The ADL comprises active elements electrically coupled to the first component layer and the second component layer. The die assembly further comprises a bonding layer electrically coupling the ADL to the second component layer. In some embodiments, the die assembly further comprises another ADL at another interface between the first component layer and a package support opposite to the interface. The first component layer may comprise another die having through-substrate vias (TSVs). The die and the another die may be fabricated using different process nodes.

Claims (22)

1 . A die assembly, comprising:

a first component layer having conductive through-connections in an insulator;

a second component layer comprising a die; and

a layer at an interface between the first component layer and the second component layer, wherein the layer includes active elements electrically coupled to the first component layer and the second component layer.

2 . The die assembly of claim 1 , further comprising a bonding layer electrically coupling the layer to the second component layer, wherein the bonding layer comprises conductive through-connections in an insulator.

3 . The die assembly of claim 1 , wherein the layer further comprises a first interconnect layer and a second interconnect layer and the active elements are between the first interconnect layer and the second interconnect layer.

4 . The die assembly of claim 3 , wherein the first interconnect layer and the second interconnect layer each comprises conductive metal traces and vias in interlayer dielectric (ILD).

5 . The die assembly of claim 4 , wherein the conductive metal traces comprise tungsten, molybdenum or ruthenium.

6 . The die assembly of claim 1 , wherein the active elements comprise source-drain-gate structures formed in a substrate layer comprising gallium nitride with silicon channels.

7 . The die assembly of claim 1 , further comprising another die in the first component layer.

8 . The die assembly of claim 1 , wherein the insulator of the first component layer comprises silica filled epoxy.

9 . A die assembly, comprising:

a first component layer having conductive through-connections in an insulator;

a second component layer comprising a die;

an active device layer (ADL) at an interface between the first component layer and the second component layer, wherein the ADL comprises active elements electrically coupled to the first component layer and the second component layer;

a bonding layer electrically coupling the ADL to the second component layer, wherein the bonding layer comprises conductive through-connections in an insulator; and

another ADL at another interface between the first component layer and a package support, wherein the another interface is opposite to the interface.

10 . The die assembly of claim 9 , further comprising another bonding layer between the first component layer and the another ADL.

11 . The die assembly of claim 10 , wherein the another ADL further comprises another first interconnect layer and another second interconnect layer with the active elements in between, and the another bonding layer is coupled to the second interconnect layer.

12 . The die assembly of claim 9 , wherein the insulator of the first component layer comprises silica filled epoxy.

13 . The die assembly of claim 9 , wherein the insulator of the bonding layer comprises silicon oxide, silicon oxy-nitride, silicon nitride, or silicon carbon nitride.

14 . The die assembly of claim 9 , wherein the active elements comprise source-drain-gate structures formed in a substrate layer comprising gallium nitride with silicon channels.