Method of manufacturing fan-out packaging device and fan-out packaging device manufactured thereby

1 . A method of manufacturing a fan-out packaging device using wafer or panel level packaging comprising:

forming a base metal layer on a partial area of a fan-out packaging substrate;

forming a first dielectric layer on the base metal layer;

patterning the first dielectric layer to form a via hole;

forming a redistribution layer (RDL) on the first dielectric layer and the via hole;

forming a second dielectric layer on the redistribution layer (RDL); and patterning the second dielectric layer to form a bump structure connected to the redistribution layer;

wherein the base metal layer comprises:

a signal unit formed on a signal pad area of a die; and

a base unit separated from the signal unit and formed on an entirety or part of a remaining area of the fan-out packaging substrate;

wherein the base unit comprises:

a first base portion separated from the signal unit and formed on the fan-out packaging device; and

a second base portion formed along an edge of the fan-out packaging device or an edge of the fan-out packaging substrate.

2 . The method according to claim 1 wherein a bridge is formed between the first base portion and the second base portion.

3 . The method according to claim 1 wherein the signal unit is formed in a wider area than the signal pad of the die.

4 . The method according to claim 1 wherein the signal unit is aligned with and contacts the redistribution layer.

5 . The method according to claim 1 wherein a ground plate of the redistribution layer and the bump structure is connected to the base unit through a via hole of the first dielectric layer.

6 . The method according to claim 1 , wherein a hole or a roughness pattern is formed in an entirety or part of the base metal layer.

7 . The method according to claim 6 , wherein diameters of the hole and the roughness pattern are less than twice a thickness of the base metal layer.

8 . The method according to claim 1 , wherein the base metal layer comprises a copper (Cu)-based material.

9 . The method according to claim 8 , wherein the base metal layer is formed as a copper layer on a titanium (Ti) or titanium tungsten (TiW) layer.

10 . The method according to claim 1 , wherein the base metal layer has a thickness of 1 to 2.2 μm.

11 . The method according to claim 1 , wherein the base metal layer is formed by forming a metal layer on the fan-out packaging substrate, forming a photoresist pattern on the fan-out packaging substrate through a photolithography process, etching the metal layer using the photoresist pattern as an etching mask, and then removing the photoresist pattern.

12 . The method according to claim 1 , wherein the base metal layer is formed by forming a photoresist pattern on the fan-out packaging substrate through a photolithography process, depositing a metal layer using the photoresist pattern as a deposition mask, and removing the photoresist pattern.

13 . The method according to claim 1 , wherein the base metal layer is formed by forming a plating layer on the fan-out packaging substrate, forming a photoresist pattern on the plating layer through a photolithography process, depositing a metal layer using the photoresist pattern as a deposition mask, removing the photoresist pattern, and etching the plating layer.

14 . The method according to claim 1 , wherein the formation of the first dielectric layer and the formation of the redistribution layer are repeatedly performed to form a plurality of redistribution layers/dielectric layers.

15 . A fan-out packaging device for wafer or panel level packaging comprising:

a fan-out packaging substrate;

a base metal layer formed on a partial area of the fan-out packaging substrate;

a first dielectric layer formed on the base metal layer and including a via hole to expose a part of the base metal layer;

a redistribution layer (RDL) formed on the first dielectric layer and the via hole;

a second dielectric layer formed on the redistribution layer (RDL) and patterned to expose a part of the redistribution layer; and

a bump structure formed on the second dielectric layer and connected to the redistribution layer;

wherein the base metal layer comprises:

a signal unit formed on a signal pad area of a die; and

a base unit separated from the signal unit and formed on an entirety or part of a remaining area of the fan-out packaging substrate;

wherein the base unit comprises:

a first base portion separated from the signal unit and formed on the fan-out packaging device; and

a second base portion formed along an edge of the fan-out packaging device or an edge of the fan-out packaging substrate.

16 . The fan-out packaging device according to claim 15 wherein a bridge is formed between the first base portion and the second base portion.

17 . The fan-out packaging device according to claim 15 wherein the signal unit is formed in a wider area than the signal pad of the die.

18 . The fan-out packaging device according to claim 15 wherein the signal unit is aligned with and contacts the redistribution layer.

19 . The fan-out packaging device according to claim 15 wherein a ground plate of the redistribution layer and the bump structure is connected to the base unit through the via hole of the first dielectric layer.

20 . The fan-out packaging device according to claim 15 , wherein a vertical through-hole or a roughness pattern is formed in an entirety or part of the base metal layer.

21 . The fan-out packaging device according to claim 20 , wherein diameters of the hole and the roughness pattern are less than twice a thickness of the base metal layer.

22 . The fan-out packaging device according to claim 15 , wherein the base metal layer comprises a copper (Cu)-based material.

23 . The fan-out packaging device according to claim 22 , wherein the base metal layer is formed as a copper layer on a titanium (Ti) or titanium tungsten (TiW) layer.

24 . The fan-out packaging device according to claim 15 , wherein the base metal layer has a thickness of 1 to 2.2 μm.