Sensed current scaling in power converters
Systems and methods for power converters are described. A digital to analog converter (DAC) can be configured to receive a digital representation of a maximum current value of a power conversion system. The DAC can be further configured to convert the digital representation of the maximum current value into an analog current signal. An analog to digital converter (ADC) can be configured to generate, based on the analog current signal, a digital signal representing a sensed current of the power conversion system as a function of the maximum current value.
1 . A semiconductor device comprising:
a digital to analog converter (DAC) configured to:
receive a digital representation of a maximum current value of a power conversion system; and
convert the digital representation of the maximum current value into an analog current signal; and
an analog to digital converter (ADC) configured to generate, based on the analog current signal, a digital signal representing a sensed current of an inductor connected to an output of a power stage in the power conversion system as a function of the maximum current value.
2 . The semiconductor device of claim 1 , further comprising a current-to-voltage converter configured to:
convert the analog current signal into a reference voltage of the ADC; and
convert the sensed current into a current sense voltage, wherein the ADC is configured to divide the current sense voltage by the reference voltage to generate the digital signal.
3 . The semiconductor device of claim 1 , further comprising:
a current-to-voltage converter configured to:
convert the analog current signal into a voltage signal; and
convert the sensed current into a current sense voltage; and
an amplifier configured to:
receive the voltage signal and the current sense voltage;
scale the current sense voltage based on the voltage signal; and
provide the scaled current sense voltage as an input voltage to the ADC, wherein the ADC is configured to divide the scaled current sense voltage by an internal reference voltage of the ADC to generate the digital signal.
4 . The semiconductor device of claim 3 , wherein the DAC and the amplifier implements a variable gain amplifier.
5 . The semiconductor device of claim 1 , wherein the maximum current value is adjustable.
6 . The semiconductor device of claim 1 , wherein the power conversion system is a single phase power conversion system.
7 . The semiconductor device of claim 1 , wherein the power conversion system is a multiphase power conversion system.
8 . A system comprising:
at least one power stage;
a controller configured to control the power stage; and
a circuit comprising:
a digital to analog converter (DAC) configured to:
receive a digital representation of a maximum current value of the system; and
convert the digital representation of the maximum current value into an analog current signal; and
an analog to digital converter (ADC) configured to generate, based on the analog current signal, a digital signal representing a sensed current of an inductor connected to an output of the power stage as a function of the maximum current value,
wherein the controller is configured to report the digital signal to a host processor.
9 . The system of claim 8 , wherein the circuit further comprises a current-to-voltage converter configured to:
convert the analog current signal into a reference voltage of the ADC; and
convert the sensed current into a current sense voltage, wherein the ADC is configured to divide the current sense voltage by the reference voltage to generate the digital signal.
10 . The system of claim 8 , wherein the circuit further comprises:
a current-to-voltage converter configured to:
convert the analog current signal into a voltage signal; and
convert the sensed current into a current sense voltage; and
an amplifier configured to:
receive the voltage signal and the current sense voltage;
scale the current sense voltage based on the voltage signal; and
provide the scaled current sense voltage as an input voltage to the ADC, wherein the ADC is configured to divide the scaled current sense voltage by an internal reference voltage of the ADC to generate the digital signal.
11 . The system of claim 10 , wherein the DAC and the amplifier implements a variable gain amplifier.
12 . The system of claim 8 , wherein the maximum current value is adjustable.
13 . The system of claim 8 , wherein the at least one power stage comprises one power stage.
14 . The system of claim 8 , wherein the at least one power stage comprises more than one power stage.
15 . A method comprising:
receiving a digital representation of a maximum current value of a power conversion system;
converting the digital representation of the maximum current value into an analog current signal; and
generating, based on the analog current signal, a digital signal representing a sensed current of an inductor connected to an output of a power stage in the power conversion system as a function of the maximum current value.
16 . The method of claim 15 , further comprising:
converting the analog current signal into a reference voltage of an analog-to-digital converter (ADC);
converting the sensed current into a current sense voltage; and
operating the ADC to divide the current sense voltage by the reference voltage to generate the digital signal.
17 . The method of claim 15 , further comprising:
converting the analog current signal into a voltage signal;
converting the sensed current into a current sense voltage, receiving the voltage signal and the current sense voltage;
scaling the current sense voltage based on the voltage signal;
providing the scaled current sense voltage as an input voltage to an ADC; and
performing an ADC operation to divide the scaled current sense voltage by an internal reference voltage of the ADC to generate the digital signal.
18 . The method of claim 17 , wherein scaling the current sense voltage comprises operating a digital-to-analog converter (DAC) in combination with an amplifier to implement a variable gain amplifier.
19 . The method of claim 15 , wherein the maximum current value is adjustable.
20 . The method of claim 15 , wherein the digital signal is a DAC code.