IP Library Granted Patent US 12699412
Granted Patent B2
US 12699412 · App. 18/676,236 · Granted Aug 4, 2026

Reference voltage circuit and electronic circuit

Inventor: Motomitsu Iwamoto (Matsumoto-city, JP)
Assignee: FUJI ELECTRIC CO., LTD.
G05F3/30G01L9/02G05F1/468G05F3/222G05F3/22
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Quick Facts
Patent No.
US 12699412
App. No.
18/676,236
Granted
Aug 4, 2026
Kind
B2
Abstract

A reference voltage circuit includes: a first resistor and a first pn junction device connected in series, and a second resistor, a third resistor, and a second pn junction device connected in series, both between a predetermined line and a ground; a first capacitor and a second capacitor; a voltage output circuit configured to amplify a first voltage at a first node between the first resistor and the first pn junction device, and amplify a second voltage at a second node between the second resistor and the third resistor, for a first time period and a second time period to thereby output a resultant voltage to the first capacitor and the second capacitor, respectively; and an amplifier circuit configured to amplify a difference between voltages at the first and second capacitors. A reference voltage corresponding to a voltage from the first amplifier circuit is applied to the predetermined line.

Claims (36)

1 . A reference voltage circuit for generating a reference voltage, comprising:

a predetermined line;

a first resistor and a first pn junction device that are provided between the predetermined line and a ground, the first pn junction device being connected in series with the first resistor;

a second resistor, a third resistor, and a second pn junction device that are provided between the predetermined line and the ground, the third resistor being connected in series with the second resistor, the second pn junction device being connected in series with the third resistor;

a first capacitor and a second capacitor;

a voltage output circuit configured to operate repeatedly with a predetermined frequency, which corresponds to a predetermined period that includes a first time period and a second time period, by

amplifying a first voltage at a first node, at which the first resistor and the first pn junction device are connected, for the first time period, to thereby output a first resultant voltage to the first capacitor, and

amplifying a second voltage at a second node, at which the second resistor and the third resistor are connected, for the second time period, to thereby output a second resultant voltage to the second capacitor; and

a first amplifier circuit configured to amplify a difference between a voltage at the first capacitor and a voltage at the second capacitor, wherein

the reference voltage is generated corresponding to a voltage outputted by the first amplifier circuit, and is applied to the predetermined line.

2 . The reference voltage circuit according to claim 1 , wherein the voltage output circuit includes

a first switch configured to select a voltage that is

the first voltage for the first time period, and

the second voltage for the second time period,

a second amplifier circuit configured to amplify the selected voltage, and

a second switch configured to

output a result of amplification of the second amplifier circuit to the first capacitor, for the first time period, and

output the result of amplification to the second capacitor, for the second time period.

3 . The reference voltage circuit according to claim 2 , wherein the second amplifier circuit amplifies a difference between the selected voltage and, a predetermined power supply voltage or a ground voltage.

4 . The reference voltage circuit according to claim 3 , further comprising: a switching circuit configured to control each of the first switch and the second switch.

5 . The reference voltage circuit according to claim 1 , further comprising:

a low-pass filter provided between an output of the first amplifier circuit and the predetermined line, wherein

a cutoff frequency of the low-pass filter is lower than the predetermined frequency.

6 . The reference voltage circuit according to claim 5 , further comprising:

a charging circuit, wherein

the low-pass filter includes a fourth resistor and a third capacitor, and

the charging circuit receives a power supply, and charges the third capacitor for a predetermined time in response to the power supply.

7 . The reference voltage circuit according to claim 5 , further comprising:

a charging circuit, wherein

the low-pass filter includes a fourth resistor and a third capacitor, and

the charging circuit receives a power supply, and charges the third capacitor to a predetermined level that is lower than a level of the reference voltage, in response to the power supply.

8 . The reference voltage circuit according to claim 1 , wherein the first pn junction device and the second pn junction device are diode-connected transistors.

9 . An electronic circuit comprising:

the reference voltage circuit according to claim 1 ; and

another circuit configured to operate based on the reference voltage, wherein

the predetermined frequency is set to be higher than an operating frequency of said another circuit.