IP Library Granted Patent US 12699432
Granted Patent B2
US 12699432 · App. 18/536,694 · Granted Aug 4, 2026

Clock pulse management to reduce peak power levels

Inventors: Venkata Kiran Kumar Matturi (Milpitas, CA); Sharath Chandra Ambula (Nizampet, IN); Niraimathi N S (Hitech City, IN)
Assignee: Micron Technology, Inc.
G06F1/28G06F1/10
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Quick Facts
Patent No.
US 12699432
App. No.
18/536,694
Granted
Aug 4, 2026
Kind
B2
Abstract

Information associated with a power consumption level of a set of components of a controller of a memory device is identified. A determination is made whether the information associated with the power consumption level satisfies one or more conditions. In response to the one or more conditions being satisfied, swallowing one or more clock pulses of a clock signal transmitted to at least one component of the set of components of the controller are swallowed.

Claims (38)

1 . A system comprising:

a memory device; and

a processing device, operatively coupled to the memory device, to perform operations comprising:

identifying first information comprising an operating temperature associated with a first power consumption level of a first component of a controller of the memory device;

determining that the first information satisfies a first condition, wherein the first condition is satisfied when the operating temperature is greater than or equal to a threshold temperature level;

in response to the first condition being satisfied, swallowing one or more clock pulses of a first clock signal transmitted to the first component of the controller;

identifying second information comprising a power consumption level associated with a second component of the controller of the memory device;

determining that the second information satisfies a second condition, wherein the second condition is satisfied when the power consumption level is greater than or equal to a threshold power consumption level; and

in response to the second condition being satisfied, swallowing one or more clock pulses of a second clock signal transmitted to the second component of the controller, wherein a third component of the controller receives an unadjusted third clock signal.

2 . The system of claim 1 , wherein the swallowing of the one or more clock pulses of the first clock signal comprises:

a first swallowing of a first clock pulse of the first clock signal transmitted to the first component of the controller; and

a second swallowing of a second clock pulse of the first clock signal transmitted to the first component of the controller.

3 . The system of claim 1 , wherein a plurality of clock pulses of the first clock signal are swallowed.

4 . The system of claim 1 , wherein the swallowing of the one or more clock pulses of the first clock signal reduces a total power consumption level associated with the first component of the controller.

5 . A method comprising:

identifying first information comprising an operating temperature associated with a first power consumption level of a first component of a controller of a memory device;

determining that the first information satisfies a first condition, wherein the first condition is satisfied when the operating temperature is greater than or equal to a threshold temperature level;

in response to the first condition being satisfied, swallowing one or more clock pulses of a first clock signal transmitted to the first component of the controller;

identifying second information comprising a power consumption level associated with a second component of the controller of the memory device;

determining that the second information satisfies a second condition, wherein the second condition is satisfied when the power consumption level is greater than or equal to a threshold power consumption level; and

in response to the second condition being satisfied, swallowing one or more clock pulses of a second clock signal transmitted to the second component of the controller, wherein a third component of the controller receives an unadjusted third clock signal.

6 . The method of claim 5 , wherein the swallowing of the one or more clock pulses of the first clock signal comprises:

a first swallowing of a first clock pulse of the first clock signal transmitted to the first component of the controller; and

a second swallowing of a second clock pulse of the first clock signal transmitted to the first component of the controller.

7 . The method of claim 5 , wherein a plurality of clock pulses of the first clock signal are swallowed.

8 . The method of claim 5 , wherein the swallowing of the one or more clock pulses of the first clock signal reduces a total power consumption level associated with the first component of the controller.

9 . A non-transitory computer readable medium comprising instructions, which when executed by a processing device, cause the processing device to perform operations comprising:

identifying first information comprising an operating temperature associated with a first power consumption level of a first component of a controller of a memory device;

determining that the first information satisfies a first condition, wherein the first condition is satisfied when the operating temperature is greater than or equal to a threshold temperature level;

in response to the first condition being satisfied, swallowing one or more clock pulses of a first clock signal transmitted to the first component of the controller;

identifying second information comprising a power consumption level associated with a second component of the controller of the memory device;

determining that the second information satisfies a second condition, wherein the second condition is satisfied when the power consumption level is greater than or equal to a threshold power consumption level; and

in response to the second condition being satisfied, swallowing one or more clock pulses of a second clock signal transmitted to the second component of the controller, wherein a third component of the controller receives an unadjusted third clock signal.

10 . The non-transitory computer readable medium of claim 9 ,

wherein the swallowing of the one or more clock pulses of the first clock signal comprises:

a first swallowing of a first clock pulse of the first clock signal transmitted to the first component of the controller; and

a second swallowing of a second clock pulse of the first clock signal transmitted to the first component of the controller.

11 . The non-transitory computer readable medium of claim 9 , wherein the swallowing of the one or more clock pulses of the first clock signal reduces a total power consumption level associated with the first component of the controller.