IP Library Granted Patent US 12699622
Granted Patent B2
US 12699622 · App. 18/599,302 · Granted Aug 4, 2026

Data processing system and data processing method

Inventors: Tomoyuki Kamazuka (Tokyo, JP); Ryota Tatsuuma (Yokohama, JP); Shoji Kato (Yokohama, JP); Yuusaku Kiyota (Tokyo, JP)
Assignee: HITACHI VANTARA, LTD.
G06F11/0793G06F11/0721
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Quick Facts
Patent No.
US 12699622
App. No.
18/599,302
Granted
Aug 4, 2026
Kind
B2
Abstract

A data processing system includes: a processor implemented by a programmable device; and a processor processing unit connected to the processor. The processor includes a plurality of processing circuits configured to execute in parallel data processing commands provided from the processor processing unit, an error detection circuit configured to detect a soft error occurring in a processing circuit that is executing the data processing command, and a processing circuit selection unit configured to select a processing circuit to execute the data processing command from a plurality of processing circuits. The processing circuit selection unit specifies a processing circuit in which the soft error occurs based on a soft error detection result of the error detection circuit, and selects a processing circuit to execute the data processing command from the plurality of processing circuits, excluding the processing circuit in which the soft error occurs.

Claims (35)

1 . A data processing system comprising:

a processor implemented by a programmable device; and

a processor processing unit connected to the processor, wherein

the processor includes

a plurality of processing circuits configured to execute in parallel data processing commands provided from the processor processing unit,

an error detection circuit configured to detect a soft error occurring in a processing circuit that is executing the data processing command, and

a processing circuit selection unit configured to select a processing circuit to execute the data processing command from the plurality of processing circuits,

the processing circuit selection unit specifies a processing circuit in which the soft error occurs based on a soft error detection result of the error detection circuit, and selects a processing circuit to execute the data processing command from the plurality of processing circuits, excluding the processing circuit in which the soft error occurs,

the error detection circuit is configured to detect the soft error and correct the detected soft error for the plurality of processing circuits in a specific period, and

after the period elapses from the specification of the processing circuit in which the soft error occurs, the processing circuit selection unit selects the processing circuit as a processing circuit that executes the data processing command.

2 . The data processing system according to claim 1 , wherein

when a soft error occurs in a specific processing circuit a predetermined count or more, the processing circuit selection unit does not select the processing circuit as a processing circuit that executes the data processing command.

3 . A data processing system comprising:

a processor implemented by a programmable device; and

a processor processing unit connected to the processor, wherein

the processor includes

a plurality of processing circuits configured to execute in parallel data processing commands provided from the processor processing unit,

an error detection and correction circuit configured to detect a soft error occurring in a processing circuit that is executing the data processing command, and

a processing circuit selection unit configured to select a processing circuit to execute the data processing command from the plurality of processing circuits,

the processing circuit selection unit specifies a processing circuit in which the soft error occurs based on a soft error detection result of the error detection circuit, and selects a processing circuit to execute the data processing command from the plurality of processing circuits, excluding the processing circuit in which the soft error occurs

in the processor, the plurality of processing circuits are classified into a plurality of processing circuit groups, and

the processing circuit selection unit is provided corresponding to the processing circuit groups.

4 . The data processing system according to claim 3 , wherein

the processor includes a processing circuit group selection unit configured to select the processing circuit group to execute the data processing command from the plurality of processing circuit groups, and

the processing circuit group selection unit selects the processing circuit group to execute the data processing command based on an execution state of the data processing command of the processing circuit belonging to the processing circuit groups.

5 . A data processing method performed by a data processing system including a processor implemented by a programmable device, and a processor processing unit connected to the processor, wherein

the processor includes

a plurality of processing circuits configured to execute in parallel data processing commands provided from the processor processing unit,

an error detection circuit configured to detect a soft error occurring in a processing circuit that is executing the data processing command, and

a processing circuit selection unit configured to select a processing circuit to execute the data processing command from the plurality of processing circuits,

the error detection circuit detects the occurrence of the soft error in the processing circuit that is executing the data processing command, and

the method comprising the steps of:

specifying, by the processing circuit selection unit, a processing circuit in which the soft error occurs based on a soft error detection result of the error detection circuit, and selecting a processing circuit to execute the data processing command from the plurality of processing circuits, excluding the processing circuit in which the soft error occurs,

detecting the soft error and correcting the detected soft error for the plurality of processing circuits in a specific period, and

after the period elapses from the specification of the processing circuit in which the soft error occurs, the processing circuit selection unit selects the processing circuit as a processing circuit that executes the data processing command.