IP Library Granted Patent US 12699647
Granted Patent B2
US 12699647 · App. 18/635,925 · Granted Aug 4, 2026

Processing unmap commands in memory systems

Inventor: Shengfei Yu (Wuhan, CN)
Assignee: Yangtze Memory Technologies Co., Ltd.
G06F12/0246G06F2212/7201G06F2212/7203
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Quick Facts
Patent No.
US 12699647
App. No.
18/635,925
Granted
Aug 4, 2026
Kind
B2
Abstract

The present disclosure involves methods, apparatuses, systems, and computer-readable storage media for processing memory controller commands in a memory system, and in particular, for processing unmap commands. In one example, a method for operating a memory system includes receiving, from a host, an unmap command corresponding to one or more logical addresses. The method further includes, in response to determining that a quantity of the one or more logical addresses is less than or equal to a first threshold, storing the one or more logical addresses in a buffer of a memory controller of the memory system. The method further includes updating a mapping table based on logical addresses stored in the buffer to unmap a mapping relationship between the logical addresses and corresponding physical addresses in the mapping table. The logical addresses stored in the buffer correspond to more than one unmap command.

Claims (50)

1 . A method for operating a memory system, comprising:

receiving, from a host coupled to the memory system, an unmap command corresponding to one or more logical addresses;

in response to determining that a quantity of the one or more logical addresses is less than or equal to a first threshold, storing the one or more logical addresses in a buffer of a memory controller of the memory system;

sending, by the memory controller to a memory device of the memory system, a program command that causes the memory device to program data related to the one or more logical addresses and the unmap command at a physical address, wherein the data related to the one or more logical addresses and the unmap command comprise metadata including the one or more logical addresses;

in response to restoring the one or more logical addresses in the buffer, receiving, from the memory device, the one or more logical addresses; and

updating a mapping table based on logical addresses stored in the buffer to unmap a mapping relationship between the logical addresses and corresponding physical addresses in the mapping table, wherein the logical addresses stored in the buffer correspond to more than one unmap command.

2 . The method of claim 1 , wherein the method further comprises:

in response to determining that a data volume of the logical addresses stored in the buffer is greater than or equal to a second threshold, updating the mapping table.

3 . The method of claim 2 , wherein the buffer comprises a physical-to-logical (P2L) buffer, wherein the logical addresses stored in the buffer are stored in the P2L buffer, and wherein the second threshold is a size of the P2L buffer.

4 . The method of claim 1 , wherein storing the one or more logical addresses in the buffer further comprises:

flipping a pre-selected bit in each one of the one or more logical addresses to indicate the one or more logical addresses are to be unmapped from corresponding one or more physical addresses when updating the mapping table.

5 . The method of claim 1 , wherein the method further comprises:

in response to receiving the unmap command, performing a program operation associated with the one or more logical addresses.

6 . The method of claim 5 , wherein the program command is associated with the program operation.

7 . The method of claim 6 , wherein the program operation comprises storing meta data in the memory device, wherein the meta data comprise the one or more logical addresses.

8 . The method of claim 1 , wherein the mapping table comprises a logical-to-physical (L2P) mapping table, a valid-page-count (VPC) table and a checkpoint, and wherein updating the mapping table comprises:

updating the corresponding physical addresses in the L2P mapping table; and

updating the VPC table and the checkpoint based on the logical addresses stored in the buffer.

9 . The method of claim 8 , wherein the L2P mapping table comprises a first-level L2P mapping table and a second-level L2P mapping table, and wherein the method further comprises:

respectively sending to the memory device: (1) the first-level L2P mapping table and the VPC table, and (2) the second-level L2P mapping table and the checkpoint.

10 . The method of claim 1 , wherein the unmap command comprises a discard unmap command.

11 . A memory controller comprising:

one or more processors; and

a storage medium that comprises a buffer, wherein the storage medium stores instructions for execution by the one or more processors to perform operations comprising:

receiving, by the memory controller, an unmap command corresponding to one or more logical addresses;

in response to determining that a quantity of the one or more logical addresses is less than or equal to a first threshold, storing the one or more logical addresses in the buffer;

sending, by the memory controller to a memory device of a memory system, a program command that causes the memory device to program data related to the one or more logical addresses and the unmap command at a physical address, wherein the data related to the one or more logical addresses and the unmap command comprise metadata including the one or more logical addresses;

in response to restoring the one or more logical addresses in the buffer, receiving, from the memory device, the one or more logical addresses; and

updating a mapping table based on logical addresses stored in the buffer to unmap a mapping relationship between the logical addresses and corresponding physical addresses in the mapping table, wherein the logical addresses stored in the buffer correspond to more than one unmap command.

12 . The memory controller of claim 11 , wherein the buffer comprises a physical-to-logical (P2L) buffer, wherein the logical addresses stored in the buffer are stored in the P2L buffer.

13 . The memory controller of claim 11 , wherein the unmap command comprises a discard unmap command.

14 . A memory system comprising:

a memory device; and

a memory controller coupled to the memory device, wherein the memory system is configured to perform operations comprising:

receiving, from a host coupled to the memory system, an unmap command corresponding to one or more logical addresses;

in response to determining that a quantity of the one or more logical addresses is less than or equal to a first threshold, storing the one or more logical addresses in a buffer of the memory controller;

sending, by the memory controller to a memory device of the memory system, a program command that causes the memory device to program data related to the one or more logical addresses and the unmap command at a physical address, wherein the data related to the one or more logical addresses and the unmap command comprise metadata including the one or more logical addresses;

in response to restoring the one or more logical addresses in the buffer, receiving, from the memory device, the one or more logical addresses; and

updating a mapping table based on logical addresses stored in the buffer to unmap a mapping relationship between the logical addresses and corresponding physical addresses in the mapping table, wherein the logical addresses stored in the buffer correspond to more than one unmap command.

15 . The memory system of claim 14 , wherein the buffer comprises a physical-to-logical (P2L) buffer, wherein the logical addresses stored in the buffer are stored in the P2L buffer.

16 . The memory system of claim 14 , wherein the operations further comprise:

in response to receiving an unmap command, performing a program operation associated with the one or more logical addresses.

17 . The memory system of claim 16 , wherein the program command is associated with the program operation, and wherein the program operation comprises:

storing meta data in the memory device, wherein the meta data comprise the one or more logical addresses.

18 . The memory system of claim 14 , wherein the mapping table comprises a logical-to-physical (L2P) mapping table, a valid-page-count (VPC) table and a checkpoint, and wherein updating the mapping table comprises:

updating the corresponding physical addresses in the L2P mapping table; and

updating the VPC table and the checkpoint based on the logical addresses stored in the buffer.

19 . The memory system of claim 18 , wherein the L2P mapping table comprises a first-level L2P mapping table and a second-level L2P mapping table, and wherein the operations further comprises:

respectively sending to a memory device coupled to the memory controller: (1) the first-level L2P mapping table and the VPC table, and (2) the second-level L2P mapping table and the checkpoint.

20 . The method system of claim 14 , wherein the unmap command comprises a discard unmap command.