IP Library Granted Patent US 12700024
Granted Patent B2
US 12700024 · App. 19/072,138 · Granted Aug 4, 2026

Parcelled quantum resources

Inventors: Chad Tyler Rigetti (Walnut Creek, CA); Robert Stanley Smith (Emeryville, CA); Matthew J. Reagor (San Rafael, CA); Michael Rust (Martinez, CA); Eric Christopher Peterson (Miami, FL); Nikolas Anton Tezak (Oakland, CA); Anand Desai (San Francisco, CA); Glenn Jones (Berkeley, CA); David Bryant (Oakland, CA)
Assignee: Rigetti & Co, LLC
G06Q30/0283G06N10/40G06N10/80G06Q30/08
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Quick Facts
Patent No.
US 12700024
App. No.
19/072,138
Granted
Aug 4, 2026
Kind
B2
Abstract

In a general aspect, methods and systems are described for dynamically partitioning and virtualizing a monolithic quantum-classical hybrid computing resource into multiple different and independently-saleable, as a resource to a user, parcels. These parcels may comprise configurations of qubits and qubit-qubit links on one or more quantum processor units for use by users for running computer programs.

Claims (52)

1 . A method of allocating plaquettes in an array of qubit devices of a quantum processor unit (QPU), the method comprising:

receiving, at a classical computer system, QPU data representing (i) a physical layout of the QPU including an arrangement of qubit devices and qubit-qubit links and (ii) performance measurements of the respective qubit devices;

receiving, at the classical computer system, a user request to execute a quantum algorithm, wherein the user request indicates an algorithm topology representing a topology of qubit devices and qubit-qubit links to execute the quantum algorithm;

identifying candidate plaquettes at least partly based on matching the algorithm topology with combinations of the qubit devices and qubit-qubit links, wherein the candidate plaquettes comprise respective subsets of the qubit devices and qubit-qubit links in the array of qubit devices;

selecting, by operation of the classical computer system, a selected plaquette from the candidate plaquettes to execute the quantum algorithm, the selected plaquette being selected based on the QPU data and the algorithm topology; and

causing the selected plaquette to execute the quantum algorithm.

2 . The method of claim 1 , wherein receiving the QPU data includes receiving, as part of the QPU data, instruction-availability information representing which quantum instructions are natively available to be expressed among respective combinations of the qubit devices.

3 . The method of claim 1 , wherein:

the candidate plaquettes include a first plaquette and a second plaquette that respectively satisfy the user request, and

selecting the selected plaquette from the candidate plaquettes includes selecting the second plaquette as the selected plaquette when a location of the first plaquette in the QPU blocks a greater percentage of complementary plaquettes than a location of the second plaquette from executing on the QPU simultaneously with the quantum algorithm, wherein

the complementary plaquettes are plaquettes that match quantum algorithms that are executed on the QPU in parallel with the quantum algorithm.

4 . The method of claim 1 , wherein the selected plaquette is selected at least partly based on which of the candidate plaquettes excludes a qubit device that is used in a set of large adjacent plaquettes, wherein a large adjacent plaquette comprises a set of contiguous qubit devices having more qubit devices than the selected plaquette.

5 . The method of claim 1 , wherein identifying the candidate plaquettes is at least partly based on comparing performance requests in the user request with the performance measurements of the combinations of the qubit devices and qubit-qubit links to determine that the candidate plaquettes respectively satisfy the performance requests.

6 . The method of claim 1 , wherein the performance measurements include measurements of gate operation properties of the respective qubit devices and the respective qubit-qubit links, including at least one of a gate fidelity, a native gate availability, a qubit count, a link count, a link topology, a readout fidelity, a qubit coherence time, and a qubit relaxation time.

7 . The method of claim 1 , comprising:

identifying a high-activity program link that is a qubit-qubit link in the algorithm topology that corresponds to more quantum operations than other qubit-qubit links in the algorithm topology;

identifying one or more qubit-qubit links in the array of qubit devices associated with above-average measured fidelities; and

identifying the candidate plaquettes at least partly based on selecting, as the candidate plaquettes, a set of plaquettes for which the high-activity program link is matched with the identified one or more qubit-qubit links.

8 . The method of claim 1 , wherein matching the algorithm topology with the combinations of the qubit devices and qubit-qubit links includes matching quantum operations associated with respective parts of the algorithm topology with native gate sets of corresponding parts of the candidate plaquettes.

9 . The method of claim 1 , wherein identifying the candidate plaquettes at least partly based on an analysis that compares time requirements of the user request with coherence times in the performance measurements.

10 . The method of claim 1 , further comprising arranging non-overlapping plaquettes comprising the selected plaquette that concurrently execute respective quantum algorithms on the array of qubit devices, and the respective quantum algorithms comprising the quantum algorithm of the user request.

11 . A computing system, comprising:

one or more processors; and

a memory storing instructions that, when executed on the one or more processors, cause the computing system to:

receive quantum processing unit (QPU) data representing (i) a physical layout of a QPU including an arrangement of qubit devices and qubit-qubit links and (ii) performance measurements of the respective qubit devices;

receive a user request to execute a quantum algorithm, wherein the user request indicates an algorithm topology representing a topology of qubit devices and qubit-qubit links to execute the quantum algorithm;

identify candidate plaquettes at least partly based on matching the algorithm topology with combinations of the qubit devices and qubit-qubit links, wherein the candidate plaquettes comprise respective subsets of the qubit devices and qubit-qubit links in an array of qubit devices;

select a selected plaquette from the candidate plaquettes to execute the quantum algorithm, the selected plaquette being selected based on the QPU data and the algorithm topology; and

cause the selected plaquette to execute the quantum algorithm.

12 . The computing system of claim 11 , wherein:

the candidate plaquettes include a first plaquette and a second plaquette that respectively satisfy the user request,

the instructions cause the computing system to select the selected plaquette from the candidate plaquettes by selecting the second plaquette as the selected plaquette when a location of the first plaquette in the QPU blocks a greater percentage of complementary plaquettes than a location of the second plaquette from executing on the QPU simultaneously with the quantum algorithm, and

the complementary plaquettes are plaquettes that match quantum algorithms that are executed on the QPU in parallel with the quantum algorithm.

13 . The computing system of claim 11 , wherein the selected plaquette is selected at least partly based on which of the candidate plaquettes excludes a qubit device that is used in a set of large adjacent plaquettes, wherein a large adjacent plaquette comprises a set of contiguous qubit devices having more qubit devices than the selected plaquette.

14 . The computing system of claim 11 , wherein the instructions cause the computing system to identify the candidate plaquettes at least partly based on comparing performance requests in the user request with the performance measurements of the combinations of the qubit devices and qubit-qubit links to determine that the candidate plaquettes respectively satisfy the performance requests.

15 . The computing system of claim 14 , wherein the performance measurements include measurements of gate operation properties of the respective qubit devices and the respective qubit-qubit links, including at least one of a gate fidelity, a native gate availability, a qubit count, a link count, a link topology, a readout fidelity, a qubit coherence time, and a qubit relaxation time.

16 . The computing system of claim 11 , wherein the instructions cause the computing system to:

identify a high-activity program link that is a qubit-qubit link in the algorithm topology that corresponds to more quantum operations than other qubit-qubit links in the algorithm topology,

identify one or more qubit-qubit links in the array of qubit devices associated with above-average measured fidelities, and

identify the candidate plaquettes at least partly based on selecting, as the candidate plaquettes, a set of plaquettes for which the high-activity program link is matched with the identified one or more qubit-qubit links.

17 . The computing system of claim 11 , wherein matching the algorithm topology with the combinations of the qubit devices and qubit-qubit links includes matching quantum operations associated with respective parts of the algorithm topology with native gate sets of corresponding parts of the candidate plaquettes.

18 . The computing system of claim 11 , wherein the instructions cause the computing system to identify the candidate plaquettes at least partly based on an analysis that compares time requirements of the user request with coherence times in the performance measurements.

19 . A non-transitory computer-readable medium comprising instructions that, when executed by one or more processors of a computing system, cause the computing system to:

receive quantum processing unit (QPU) data representing (i) a physical layout of a QPU including an arrangement of the qubit devices and qubit-qubit links and (ii) performance measurements of the respective qubit devices;

receive a user request to execute a quantum algorithm, wherein the user request indicates an algorithm topology representing a topology of qubit devices and qubit-qubit links to execute the quantum algorithm;

identify candidate plaquettes at least partly based on matching the algorithm topology with combinations of the qubit devices and qubit-qubit links, wherein the candidate plaquettes comprise respective subsets of the qubit devices and qubit-qubit links in the array of qubit devices;

select a selected plaquette from the candidate plaquettes to execute the quantum algorithm, the selected plaquette being selected based on the QPU data and the algorithm topology; and

cause the selected plaquette to execute the quantum algorithm.

20 . The non-transitory computer-readable medium of claim 19 , wherein:

the candidate plaquettes include a first plaquette and a second plaquette that respectively satisfy the user request,

the instructions cause the computing system to select the selected plaquette from the candidate plaquettes by selecting the second plaquette as the selected plaquette when a location of the first plaquette in the QPU blocks a greater percentage of complementary plaquettes than a location of the second plaquette from executing on the QPU simultaneously with the quantum algorithm, and

the complementary plaquettes are plaquettes that match quantum algorithms that are executed on the QPU in parallel with the quantum algorithm.