Pixels
A pixel includes a first transistor configured to output a driving current corresponding to a magnitude of a data voltage, a second transistor connected to a data line, a third transistor connected between a second terminal of the first transistor and a gate of the first transistor, a fourth transistor connected between a first terminal of the first transistor and a driving voltage line, a fifth transistor connected to the second terminal of the first transistor, a sixth transistor connected between the first terminal of the first transistor and the second transistor, a light-emitting diode connected to the fifth transistor, and a storage capacitor connected between the gate of the first transistor and the driving voltage line.
1 . A pixel comprising:
a first transistor configured to output a driving current corresponding to a magnitude of a data voltage;
a second transistor connected to a data line;
a third transistor connected between a second terminal of the first transistor and a gate of the first transistor;
a fourth transistor connected between a first terminal of the first transistor and a driving voltage line;
a fifth transistor connected to the second terminal of the first transistor;
a sixth transistor connected between the first terminal of the first transistor and the second transistor;
a light-emitting diode connected to the fifth transistor; and
a storage capacitor connected between the gate of the first transistor and the driving voltage line,
wherein the second transistor and the sixth transistor are simultaneously turned on and simultaneously turned off.
2 . The pixel of claim 1 , further comprising a seventh transistor connected between the third transistor and an initialization voltage line.
3 . The pixel of claim 2 , further comprising an eighth transistor connected between the fifth transistor and the initialization voltage line.
4 . The pixel of claim 3 , wherein the pixel operates in a non-emission period and an emission period, during a frame period,
wherein the non-emission period comprises:
a first period in which the seventh transistor is turned on, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the eighth transistor are turned off, and an initialization voltage is applied to the gate of the first transistor from the initialization voltage line; and
a second period in which the second transistor, the third transistor, the sixth transistor, and the eighth transistor are turned on, the fourth transistor, the fifth transistor, and the seventh transistor are turned off, a data signal is applied to the gate of the first transistor from the data line, and the initialization voltage is applied to a first terminal of the light-emitting diode from the initialization voltage line.
5 . The pixel of claim 4 , wherein, in the second period, a data voltage corresponding to the data signal applied to the first transistor and a threshold voltage of the first transistor are stored in the storage capacitor.
6 . The pixel of claim 4 , wherein the fourth transistor and the fifth transistor are turned on during the emission period.
7 . The pixel of claim 6 , wherein the non-emission period further comprises, between the second period and the emission period, a delay period in which the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are turned off.
8 . The pixel of claim 7 , wherein, in the second period, the second transistor and the third transistor are controlled by a first gate signal, the eighth transistor is controlled by a second gate signal, and the sixth transistor is controlled by a third gate signal.
9 . The pixel of claim 8 , wherein a timing at which the third gate signal transitions from a gate-on voltage to a gate-off voltage and the sixth transistor is turned off is ahead of a timing at which the first gate signal transitions from the gate-on voltage to the gate-off voltage and the second transistor is turned off.
10 . The pixel of claim 7 , wherein, during the delay period, a gate-source voltage of the turned-off sixth transistor is greater than a gate-source voltage of the turned-off second transistor.
11 . A pixel comprising:
a first transistor configured to output a driving current corresponding to a magnitude of a data voltage;
a second transistor connected between a first terminal of the first transistor and a data line;
a third transistor connected between a second terminal of the first transistor and a gate of the first transistor;
a fourth transistor connected between the first terminal of the first transistor and a driving voltage line;
a fifth transistor connected to the second terminal of the first transistor;
a sixth transistor connected between the fifth transistor and a light-emitting diode; and
a storage capacitor connected between the gate of the first transistor and the driving voltage line,
wherein the fourth transistor, the fifth transistor, and the sixth transistor are simultaneously turned on and simultaneously turned off, and
wherein the sixth transistor comprises a first terminal connected to the fifth transistor and a second terminal connected to an anode of the light-emitting diode.
12 . The pixel of claim 11 , further comprising a seventh transistor connected between the third transistor and an initialization voltage line.
13 . The pixel of claim 12 , further comprising an eighth transistor connected between the sixth transistor and the initialization voltage line.
14 . The pixel of claim 13 , wherein the pixel operates in a non-emission period and an emission period, during a frame period,
wherein the non-emission period comprises:
a first period in which the seventh transistor is turned on, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the eighth transistor are turned off, and an initialization voltage is applied to the gate of the first transistor from the initialization voltage line; and
a second period in which the second transistor, the third transistor, and the eighth transistor are turned on, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are turned off, a data signal is applied to the gate of the first transistor from the data line, and the initialization voltage is applied to a first terminal of the light-emitting diode from the initialization voltage line.
15 . The pixel of claim 14 , wherein the fourth transistor, the fifth transistor, and the sixth transistor are turned on in the emission period.
16 . The pixel of claim 15 , wherein the non-emission period further comprises, between the second period and the emission period, a delay period in which the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, and the eighth transistor are turned off.
17 . The pixel of claim 15 , wherein, in the second period, the second transistor and the third transistor are controlled by a fourth gate signal, and the eighth transistor is controlled by a fifth gate signal.
18 . The pixel of claim 15 , wherein, in the emission period, the fourth transistor and the fifth transistor are controlled by a sixth gate signal, and the sixth transistor is controlled by a seventh gate signal.
19 . The pixel of claim 18 , wherein a timing at which the seventh gate signal transitions from a gate-on voltage to a gate-off voltage and the sixth transistor is turned off is ahead of a timing at which the sixth gate signal transitions from the gate-on voltage to the gate-off voltage and the fifth transistor is turned off.
20 . The pixel of claim 14 , wherein, during the non-emission period, the fifth transistor and the sixth transistor are turned off, and a gate-source voltage of the turned-off sixth transistor is greater than a gate-source voltage of the turned-off fifth transistor.