Multilayer ceramic capacitor

1 . A multilayer ceramic capacitor comprising:

a stacked body including a plurality of dielectric layers and a plurality of internal electrodes that are stacked in a stacking direction, the stacked body including:

a first main surface and a second main surface opposite to each other in the stacking direction;

a first lateral surface and a second lateral surface opposite to each other in a longitudinal direction orthogonal or substantially orthogonal to the stacking direction; and

a third lateral surface and a fourth lateral surface opposite to each other in a width direction orthogonal or substantially orthogonal to the stacking direction and the longitudinal direction; and

a plurality of external electrodes disposed on the lateral surfaces of the stacked body; wherein

the plurality of internal electrodes include a plurality of first internal electrodes and a plurality of second internal electrodes alternately stacked, with the plurality of dielectric layers interposed therebetween;

the plurality of first internal electrodes include:

first leading portions extending to the first lateral surface; and

second leading portions extending to the second lateral surface;

the plurality of second internal electrodes include:

third leading portions extending to the first lateral surface; and

fourth leading portions extending to the second lateral surface;

the plurality of external electrodes include:

a first external electrode connected to the first leading portions and covering the first leading portions exposed at the first lateral surface, the first external electrode covering a portion of each of the first main surface, and the first lateral surface;

a second external electrode connected to the second leading portions and covering the second leading portions exposed at the second lateral surface, the second external electrode covering a portion of each of the first main surface, and the second lateral surface;

a third external electrode connected to the third leading portions and covering the third leading portions exposed at the first lateral surface, the third external electrode covering a portion of each of the first main surface, and the first lateral surface; and

a fourth external electrode connected to the fourth leading portions and covering the fourth leading portions exposed at the second lateral surface, the fourth external electrode covering a portion of each of the first main surface, and the second lateral surface;

the plurality of dielectric layers include outer layer portions and an effective layer portion;

one of the outer layer portions is located adjacent to the first main surface of the stacked body, and another of the outer layer portions is located adjacent to the second main surface of the stacked body;

the one of the outer layer portions is one of the plurality of dielectric layers that is located between the first main surface and one of the plurality of internal electrodes that is closest to the first main surface;

the another of the outer layer portions is one of the plurality of dielectric layers that is located between the second main surface and one of the plurality of internal electrodes that is closest to the second main surface;

each of the outer layer portions is not more than about 12 μm in thickness in the stacking direction;

the effective layer portion is a region sandwiched between the outer layer portions;

where a dimension of the stacked body in the stacking direction is denoted by t, and a dimension of the effective layer portion in the stacking direction is denoted by t′, a ratio of the dimension t′ of the effective layer portion in the stacking direction to the dimension t of the stacked body in the stacking direction is not less than about 53% and not more than about 83%;

the dimension t of the stacked body in the stacking direction is not less than about 30 μm and not more than about 80 μm;

a dimension T of the multilayer ceramic capacitor in the stacking direction satisfies about 50 μm≤T≤about 110 μm;

L≤750 μm is satisfied, where L denotes the maximum dimension between two outermost lateral surfaces of opposing ones of the external electrodes;

the first external electrode is electrically connected to the first leading portions at the first lateral surface;

the second external electrode is electrically connected to the second leading portions at the second lateral surface;

the third external electrode is electrically connected to the third leading portions at the first lateral surface;

the fourth external electrode is electrically connected to the fourth leading portions at the second lateral surface; and

d 3 ≤d 2 ≤d 1 , where d 1 denotes a thickness of at least one of the plurality of external electrodes in the longitudinal direction or the width direction in a same plane as an internal electrode located closest to one of the first and second main surfaces, d 2 denotes a thickness of at least one of the plurality of external electrodes in the stacking direction, at a ½ position in the longitudinal direction or the width direction, located on one of the first and second main surfaces, and d 3 denotes a thickness of at least one of the plurality of external electrodes in the longitudinal direction or the width direction, at the ½ position in the stacking direction, located on at least one of the first, second, third, and fourth lateral surfaces.

2 . The multilayer ceramic capacitor according to claim 1 , wherein

the first leading portions exposed at the first lateral surface of the stacked body, and the second leading portions exposed at the second lateral surface of the stacked body are not less than about 135 μm and not more than about 195 μm in dimension in the longitudinal direction and the width direction; and

the third leading portions exposed at the first lateral surface of the stacked body, and the fourth leading portions exposed at the second lateral surface of the stacked body are not less than about 135 μm and not more than about 195 μm in dimension in the longitudinal direction and the width direction.

3 . The multilayer ceramic capacitor according to claim 1 , wherein a ratio of a total thickness of both of the outer layer portions to the dimension of the effective layer portion in the stacking direction is not less than about 21% and not more than about 88%.

4 . The multilayer ceramic capacitor according to claim 1 , wherein a ratio of a total thickness of both of the outer layer portions to the dimension of the stacked body in the stacking direction is not less than about 18% and not more than about 47%.

5 . The multilayer ceramic capacitor according to claim 1 , wherein corners and ridge lines of the stacked body are rounded.

6 . The multilayer ceramic capacitor according to claim 1 , wherein a dimension of each of the outer layer portions is not less than about 3 μm.

7 . The multilayer ceramic capacitor according to claim 1 , wherein an average thickness of each the plurality of dielectric layers is not less than about 0.4 μm and not more than about 1.0 μm.

8 . The multilayer ceramic capacitor according to claim 1 , wherein an average thickness of each the plurality of dielectric layers is not less than about 0.4 μm and not more than about 0.8 μm.

9 . The multilayer ceramic capacitor according to claim 1 , wherein an average thickness of each the plurality of dielectric layers is not less than about 0.4 μm and not more than about 0.6 μm.

10 . The multilayer ceramic capacitor according to claim 1 , wherein

the plurality of first internal electrodes include first facing portions facing the first and second main surfaces; and

the plurality of second internal electrodes include second facing portions facing the first and second main surfaces.

11 . The multilayer ceramic capacitor according to claim 10 , wherein the stacked body includes a first lateral portion defined by one end of the first facing portions in the longitudinal direction and the first lateral surface, and a second lateral portion defined by another end of the second facing portions in longitudinal direction and the second lateral surface.

12 . The multilayer ceramic capacitor according to claim 11 , wherein an average dimension of the first and second lateral portions of the stacked body is not less than about 10 μm and not more than about 70 μm.

13 . The multilayer ceramic capacitor according to claim 11 , wherein an average dimension of the first and second lateral portions of the stacked body is not less than about 10 μm and not more than about 50 μm.

14 . The multilayer ceramic capacitor according to claim 11 , wherein an average dimension of the first and second lateral portions of the stacked body is not less than about 10 μm and not more than about 30 μm.

15 . The multilayer ceramic capacitor according to claim 1 , wherein

the first leading portions extend to the first and third lateral surfaces;

the second leading portions extend to the second and fourth lateral surfaces;

the third leading portions extend to the first and fourth lateral surfaces; and

the fourth leading portions extend to the second and third lateral surfaces.

16 . The multilayer ceramic capacitor according to claim 1 , wherein

the first external electrode covers a portion of each of the first main surface and the second main surface;

the second external electrode covers a portion of each of the first main surface and the second main surface;

the third external electrode covers a portion of each of the first main surface and the second main surface; and

the fourth external electrode covers a portion of each of the first main surface and the second main surface.

17 . The multilayer ceramic capacitor according to claim 15 , wherein

the first external electrode covers a portion of each of the first main surface and the second main surface;

the second external electrode covers a portion of each of the first main surface and the second main surface;

the third external electrode covers a portion of each of the first main surface and the second main surface; and

the fourth external electrode covers a portion of each of the first main surface and the second main surface.