Systems and methods for reducing reflected power after a state transition

1 . A method for reducing reflected power associated with a high frequency (HF) radio frequency (RF) generator after a transition state, comprising:

controlling the HF RF generator to divide a state of an HF RF signal into a plurality of sub-states, wherein the plurality of sub-states include a first sub-state and a second sub-state;

controlling the HF RF generator to apply a first reference high frequency value during the first sub-state and a second reference high frequency value during the second sub-state;

applying a first set of HF offset values from the first reference high frequency value during the first sub-state; and

applying a second set of HF offset values from the second reference high frequency value during the second sub-state.

2 . The method of claim 1 , wherein the state includes the transition state and a steady state, wherein during the steady state, the HF RF signal has a power level within a pre-determined range, wherein during the transition state, the HF RF signal has a power level outside the pre-determined range.

3 . The method of claim 1 , wherein said controlling the HF RF generator to divide the state into the plurality of sub-states includes:

providing a first duty cycle of the first sub-state and a second duty cycle of the second sub-state to the HF RF generator;

providing a first power level of the HF RF signal to be applied during the first duty cycle;

providing a second power level of the HF RF signal to be applied during the second duty cycle, wherein the first power level is equal to the second power level.

4 . The method of claim 1 , further comprising:

accessing, for each of the plurality of sub-states, a hold-off period and an aperture window; and

tuning a frequency of the HF RF signal during the aperture window.

5 . The method of claim 4 , further comprising avoiding tuning of the frequency of the HF RF signal during the hold-off period.

6 . The method of claim 1 , wherein the first reference high frequency value is different from the second reference high frequency value.

7 . The method of claim 1 , wherein the first sub-state includes the transition state and a first portion of a steady state, and the second sub-state includes a second portion of the steady state.

8 . A controller for reducing reflected power associated with a high frequency (HF) radio frequency (RF) generator after a transition state, comprising:

a processor configured to:

control the HF RF generator to divide a state of an HF RF signal into a plurality of sub-states, wherein the plurality of sub-states include a first sub-state and a second sub-state;

control the HF RF generator to apply a first reference high frequency value during the first sub-state and a second reference high frequency value during the second sub-state;

apply a first set of HF offset values from the first reference high frequency value during the first sub-state; and

apply a second set of HF offset values from the second reference high frequency value during the second sub-state; and

a memory device coupled to the processor.

9 . The controller of claim 8 , wherein the state includes the transition state and a steady state, wherein during the steady state, the HF RF signal has a power level within a pre-determined range, wherein during the transition state, the HF RF signal has a power level outside the pre-determined range.

10 . The controller of claim 8 , wherein to control the HF RF generator to divide the state into the plurality of sub-states, the processor is configured to:

provide a first duty cycle of the first sub-state and a second duty cycle of the second sub-state to the HF RF generator;

provide a first power level of the HF RF signal to be applied during the first duty cycle;

provide a second power level of the HF RF signal to be applied during the second duty cycle, wherein the first power level is equal to the second power level.

11 . The controller of claim 8 , wherein the processor is configured to:

access, for each of the plurality of sub-states, a hold-off period and an aperture window; and

tune a frequency of the HF RF signal during the aperture window.

12 . The controller of claim 11 , wherein the processor is configured to avoid tuning of the frequency of the HF RF signal during the hold-off period.

13 . The controller of claim 8 , wherein the first reference high frequency value is different from the second reference high frequency value.

14 . The controller of claim 8 , wherein the first sub-state includes the transition state and a first portion of a steady state, and the second sub-state includes a second portion of the steady state.