Stacked double junction circulator device and methods for fabrication
The disclosure provides designs and methods of fabrication of stacked double junction circulator device that includes two or more ferrite elements. The disclosed stacked double junction circulator device uses a single magnet, instead of two magnets that are conventionally used for the side-by-side double junction circulator. The disclosed stacked double junction circulator device offers significant advantages in regards to installation requirements on the customer side.
1 . A device comprising:
a bottom ground plane;
a first dielectric layer disposed over the bottom ground plane the first dielectric layer
comprising a first junction circuit disposed on a top side of the first dielectric layer opposite from the bottom ground plane;
a second dielectric layer disposed over the first dielectric layer, the second dielectric layer having a first opening that embeds a first ferrite element;
a third dielectric layer disposed over the second dielectric layer;
a fourth dielectric layer disposed over the third dielectric layer, the fourth dielectric layer having a second opening that embeds a second ferrite element aligned with the first ferrite element;
a fifth dielectric layer disposed over the fourth dielectric layer, wherein-the fifth dielectric layer comprising a second junction circuit on a bottom side adjacent to the fourth dielectric layer.
2 . The device of claim 1 , further comprising a top ground plane disposed over the fifth dielectric layer opposite to the second junction circuit.
3 . The device of claim 2 , wherein the first junction circuit comprises a first junction of circuit traces with a first central junction vertically aligned with a center respective to the first ferrite element.
4 . The device of claim 2 wherein the second junction circuit comprises a second junction of circuit traces with a second central junction vertically aligned with a center respective to the second ferrite element.
5 . The device of claim 2 , wherein the first junction circuit comprises:
a first circuit port connected to a transmitter as a first RF port;
a second circuit port connected to a first port of the second junction circuit; and
a third circuit port connected to an RF termination as a fourth RF port of the device.
6 . The device of claim 5 , wherein the second junction circuit comprises a second port connecting to an antenna as a second RF port and a third port connecting to a receiver as a third RF port.
7 . The device of claim 2 , further comprising a magnet over the top ground plane for providing magnetic bias.
8 . The device of claim 1 , wherein each of the first ferrite element and the second ferrite element is in one of a circular shape, triangular shape, or hexagon shape.
9 . The device of claim 1 , further comprising:
a third junction circuit disposed over a top side of the fifth dielectric layer opposite to the second junction circuit;
a sixth dielectric layer disposed over the fifth dielectric layer, the sixth dielectric layer having a third opening that embeds a third ferrite element aligned with the first ferrite element and the second ferrite element; and
a seventh dielectric layer disposed over the sixth dielectric layer;
a top ground plane disposed over the seventh dielectric layer; and
a lower ground plane on an opposite side of the seventh dielectric layer to the top ground plane.
10 . The device of claim 9 , wherein the first junction circuit comprises a first junction of circuit traces with a first central junction vertically aligned with a center respective to the first ferrite element.
11 . The device of claim 10 , wherein the second junction circuit comprises a second junction of circuit traces with a second central junction vertically aligned with a center respective to the second ferrite element.
12 . The device of claim 11 , wherein the third junction circuit comprises a third junction of circuit traces with a third central junction vertically aligned with a center respective to the third ferrite element.
13 . The device of claim 1 , wherein the device is configured to function as an isolator by connecting at least one circuit port of one junction connecting an RF termination comprising a termination component to at least one circuit port associated with one of the first or second junction circuit, wherein the at least one circuit port of the one of the first or second junction circuit does not connect to any circuit port of another of the second or first junction circuit.
14 . The device of claim 13 , wherein the termination component is integrated with the device.
15 . The device of claim 13 , wherein the termination component is positioned on a PCB adjacent to the device.
16 . The device of claim 1 , wherein the device comprises a first RF port, a second RF port, a third RF port, and a fourth RF port.
17 . The device of claim 1 , wherein the device is suitable for radio frequency applications.
18 . The device of claim 1 , wherein the device is a surface mount component on a Printed circuit board (PCB).
19 . The device of claim 1 , further comprising a first middle ground layer between the second dielectric layer and the third dielectric layer; and a second middle ground layer between the third dielectric layer and the fourth dielectric layer.
20 . The device of claim 1 , wherein the device is configured to operate in a clockwise direction or a counterclockwise direction depending upon an applied magnetic bias field.
21 . A method for fabricating a device, the method comprising:
disposing a first dielectric layer over a bottom ground plane, the first dielectric layer comprising a first junction circuit over a top side of the first dielectric layer opposite from the bottom ground plane;
disposing a second dielectric layer over the first dielectric layer;
embedding a first ferrite element in a first opening of the second dielectric layer;
disposing a third dielectric layer over the second dielectric layer:
disposing a fourth dielectric layer over the third dielectric layer:
embedding a second ferrite element in a second opening of the fourth dielectric layer;
aligning the first ferrite element with the second ferrite element;
disposing a fifth dielectric layer disposed over the fourth dielectric layer, the fifth dielectric layer comprising a second junction circuit over a bottom side adjacent to the fourth dielectric layer:
aligning a first central junction of the first junction circuit with a second central junction of the second junction circuit; and
forming a stack including the first, second, third, fourth, and fifth dielectric layers, the bottom ground plane, the first junction circuit, the second junction circuit, the first ferrite element, and the second ferrite element.
22 . The method of claim 21 , further comprising bonding two adjacent dielectric layers using fusion bonding.
23 . The method of claim 21 , wherein the fifth dielectric layer comprises a top ground plane on the top side opposite to the second junction circuit.
24 . The method of claim 21 , wherein the
third dielectric layer comprises a first middle ground layer on its bottom side; and
a second middle ground layer on its top side.
25 . The method of claim 21 , further comprising placing a magnet on the fifth dielectric layer opposite to the second junction circuit; and attaching the magnet to the fifth dielectric layer of the stack.
26 . The method of claim 21 , further comprising bonding two adjacent dielectric layers using a liquid resin or prepreg material.