Full-functionality back power protection (BPP) input/output (I/O) circuit with overvoltage protection including electrostatic discharge

1 . An apparatus, comprising:

an overvoltage detector including an input coupled to an input/output (I/O) port;

a control circuit including an input coupled to an output of the overvoltage detector;

a pseudo power source including an input coupled to the I/O port, and an output coupled to the control circuit; and

a clamp circuit coupled between the I/O port and a voltage rail, through a diode, wherein the clamp circuit includes an input coupled to an output of the control circuit, wherein the pseudo power source comprises a first diode coupled in series with a capacitor between the I/O port and the voltage rail, wherein a node between the first diode and the capacitor is coupled to or serves as the output of the pseudo power source.

2 . The apparatus of claim 1 , further comprising a floating bus coupled between the diode and the clamp circuit.

3 . The apparatus of claim 1 , wherein the overvoltage detector comprises a set of one or more diodes coupled in series with a resistive device between the I/O port and the voltage rail, wherein a node between the set of one or more diodes and the resistive device is coupled to or serves as the output of the overvoltage detector.

4 . The apparatus of claim 1 , wherein the pseudo power source further comprises a second diode coupled between another voltage rail and the node, and a third diode coupled between the node and the voltage rail.

5 . The apparatus of claim 1 , wherein the control circuit comprises:

a capacitor coupled between the diode and a first node;

a latch coupled between the first node and a second node; and

a first transistor coupled between the first node and the voltage rail, wherein the first transistor includes a control input coupled to or serving as the input of the control circuit.

6 . The apparatus of claim 5 , wherein the latch comprises cross-coupled inverters coupled between the first and second nodes.

7 . The apparatus of claim 5 , wherein the latch is coupled to the output of the pseudo power source.

8 . The apparatus of claim 5 , wherein the control circuit further comprises a buffer including an input coupled to the first node, and an output coupled to or serving as the output of the control circuit.

9 . The apparatus of claim 8 , wherein the buffer comprises a set of cascaded inverters coupled between the first node and the output of the buffer.

10 . The apparatus of claim 8 , wherein the buffer is coupled to the output of the pseudo power source.

11 . The apparatus of claim 5 , wherein the control circuit comprises a second transistor coupled between the second node and the voltage rail, wherein the second transistor includes a control input coupled to another voltage rail.

12 . The apparatus of claim 1 , wherein the clamp circuit comprises:

a resistive device coupled in series with a capacitor between the diode and the voltage rail;

a first transistor, a second transistor, and a third transistor coupled in series between the diode and the voltage rail, wherein the first transistor includes a control input coupled to or serving as the input of the clamp circuit, wherein the second and third transistors include control inputs coupled to a first node between the resistive device and the capacitor;

a fourth transistor coupled between a second node between the second and third transistors and the voltage rail, wherein the fourth transistor includes a control input coupled to or serving as the input of the clamp circuit; and

a fifth transistor coupled between the diode and the voltage rail, wherein the fifth transistor includes a control input coupled to the second node.

13 . The apparatus of claim 1 , further comprising:

a data or clock source;

a transmit driver including an input coupled to the data or clock source, and an output coupled to the I/O port, wherein the transmit driver is coupled between another voltage rail and the voltage rail;

another diode coupled between the I/O port and the voltage rail; and

a diode coupled between another voltage rail and the clamp circuit.

14 . An apparatus, comprising:

an overvoltage detector configured to generate an overvoltage indicating signal indicating whether a first voltage at an input/output (I/O) port is above an overvoltage threshold;

a control circuit configured to generate a control signal based on the overvoltage indicating signal;

a pseudo power source coupled to the I/O port and configured to provide a supply voltage for the control circuit; and

a clamp circuit configured to generate a shunt current from the I/O port through an electrostatic discharge (ESD) protection diode, wherein the shunt current is enabled or disabled based on the control signal, wherein the control circuit comprises

a latch configured to initialize the control signal to a first state based on the first voltage at the I/O port, and

a circuit configured to flip the latch to set the control signal at a second state in response to the overvoltage indicating signal.

15 . The apparatus of claim 14 , wherein the pseudo power source is configured to generate the supply voltage from communication signaling at the I/O port.

16 . The apparatus of claim 14 , wherein the overvoltage detector comprises a set of one or more diodes coupled in series with a resistive device between the I/O port and a voltage rail, wherein the overvoltage indicating signal is or based on a second voltage at a node between the set of one or more diodes and the resistive device.

17 . The apparatus of claim 14 , wherein the pseudo power source comprises a diode coupled in series with a capacitor between the I/O port and a voltage rail, wherein the supply voltage is or based on a second voltage at a node between the diode and the capacitor.

18 . The apparatus of claim 14 , wherein the clamp circuit is configured to be:

disabled based on the first state of the control signal; or

enabled based on the second state of the control signal.

19 . The apparatus of claim 18 , wherein the clamp circuit is configured to:

not respond to the first voltage at the I/O port when it is disabled; or

shunt current from the I/O port to a voltage rail in response to the first voltage when it is enabled.

20 . A method, comprising:

generating an overvoltage indicating signal indicating whether a voltage at an input/output (I/O) port is above an overvoltage threshold;

generating a control signal based on the overvoltage indicating signal; and

enabling or disabling a shunting of current produced by the voltage from the I/O port to a voltage rail based on the control signal, wherein generating the control signal comprises

initializing the control signal to a first state based on the voltage at the I/O port, and

setting the control signal to a second state in response to the overvoltage indicating signal.

21 . The method of claim 20 , wherein generating the overvoltage indicating signal comprises applying the voltage across a set of one or more diodes coupled in series with a resistive device between I/O port and the voltage rail.

22 . The method of claim 20 , further comprising generating a supply voltage for generating the control signal based on the voltage at the I/O port.

23 . The method of claim 22 , wherein generating the supply voltage comprises applying the voltage at the I/O port across a diode coupled in series with a capacitor between the I/O port and the voltage rail.

24 . The method of claim 20 , wherein enabling or disabling the shunting of the current, comprises:

disabling the shunting of the current based on the first state of the control signal; or

enabling the shunting of the current based on the second state of the control signal.

25 . An apparatus, comprising:

means for generating an overvoltage indicating signal indicating whether a voltage at an input/output (I/O) port is above an overvoltage threshold;

means for generating a control signal based on the overvoltage indicating signal; and

means for enabling or disabling a shunting of current produced by the voltage from the I/O port to a voltage rail based on the control signal, wherein the means for generating the control signal comprises

means for initializing the control signal to a first state based on the voltage at the I/O port, and

means for setting the control signal to a second state in response to the overvoltage indicating signal.

26 . The apparatus of claim 25 , further comprising means for generating a supply voltage based on the voltage at the I/O port, wherein the means for generating the control signal is coupled to the means for generating the supply voltage.