Apparatus for generating a digital signal dependent on a current slope
An apparatus for generating a digital signal that is dependent on an average slope of a first current flowing through a circuit element during a sample period, the apparatus comprising a delta-sigma modulator configured to sense the first current during the sample period, and generate the digital signal using the sensed first current.
1 . An apparatus for generating a digital signal that is dependent on an average slope of a first current flowing through a circuit element during a sample period, the apparatus comprising:
a delta-sigma modulator configured to:
sense the first current during the sample period; and
generate the digital signal using the sensed first current by converting the average slope of the first current into the digital signal,
wherein the average slope of the sensed first current is an average rate of change of the sensed first current with time.
2 . The apparatus of claim 1 , comprising a slope calculation unit configured to:
receive the digital signal; and
determine the average slope of the first current during the sample period using the digital signal.
3 . The apparatus of claim 1 , wherein the delta-sigma modulator is configured to sense the first current flowing through the circuit element of a switching converter.
4 . The apparatus of claim 3 , wherein the delta-sigma modulator is configured to sense the first current flowing through the circuit element by sensing a current flow through a first power switch of the switching converter.
5 . The apparatus of claim 1 , wherein the delta-sigma modulator is configured to:
sense the first current at a first time step and at a second time step within the sample period; and
generate the digital signal using the first current as sensed at the first time step and at the second time step.
6 . The apparatus of claim 5 , wherein the delta-sigma modulator comprises:
a summing circuit configured to:
sense the first current at the first time step by measuring a first voltage across a sense element at the first time step;
sense the first current at the second time step by measuring the first voltage across the sense element at the second time step; and
generate a difference signal that is dependent on the first voltage at the second time step subtracted from the first voltage at the first time step,
wherein the first voltage is dependent on the first current.
7 . The apparatus of claim 6 , wherein:
the sense element comprises a first switch having a first resistance; and
the summing circuit comprises a mirror switch having a second resistance, and forming a switch pair comprising the first switch and the mirror switch.
8 . The apparatus of claim 7 , wherein:
the first switch comprises a first transistor; and
the mirror switch comprises a second transistor,
wherein gates of each of the first and second transistors are configured to receive a supply voltage.
9 . The apparatus of claim 8 , wherein the summing circuit comprises:
a first capacitor having:
a first terminal coupled to:
a first terminal of the first transistor via a first switch; and
a ground terminal via a second switch; and
a second terminal coupled to:
a difference node via a third switch; and
a common mode gain terminal via a fourth switch; and
a second capacitor having:
a first terminal coupled to:
a first terminal of a mirror transistor via a fifth switch; and
the common mode gain terminal via a sixth switch; and
a second terminal coupled to:
the difference node via a seventh switch; and
the ground terminal via an eighth switch.
10 . The apparatus of claim 6 , wherein the delta-sigma modulator comprises a first integration circuit configured to receive the difference signal and to generate an integrated voltage signal.
11 . The apparatus of claim 10 , wherein the first integration circuit comprises a first differential amplifier.
12 . The apparatus of claim 11 , wherein:
the first integration circuit comprises a first integration circuit capacitor; and
a first input terminal of the first differential amplifier is coupled to an output terminal of the first differential amplifier via the first integration circuit capacitor.
13 . The apparatus of claim 10 , wherein the delta-sigma modulator comprises a first comparator configured to receive the integrated voltage signal and to output the digital signal.
14 . The apparatus of claim 1 , wherein the digital signal comprises a plurality of bits.
15 . The apparatus of claim 14 , wherein the delta-sigma modulator comprises a multi-bit quantizer configured to generate the digital signal.
16 . The apparatus of claim 15 , wherein the delta-sigma modulator is configured to:
sense the first current at a first time step and at a second time step within the sample period; and
generate the digital signal using the first current as sensed at the first time step and at the second time step.
17 . The apparatus of claim 16 , wherein the delta-sigma modulator comprises:
a summing circuit configured to:
sense the first current at the first time step by measuring a first voltage across a sense element at the first time step;
sense the first current at the second time step by measuring the first voltage across the sense element at the second time step; and
generate a difference signal that is dependent on an second voltage subtracted from the first voltage,
wherein the first voltage is dependent on the first current.
18 . The apparatus of claim 17 , wherein the delta-sigma modulator comprises a first integration circuit configured to receive the difference signal and to generate an integrated voltage signal.
19 . The apparatus of claim 18 , wherein the first integration circuit comprises a first differential amplifier.
20 . The apparatus of claim 19 , wherein:
the first integration circuit comprises a first integration circuit capacitor; and
a first input terminal of the first differential amplifier is coupled to an output terminal of the first differential amplifier via the first integration circuit capacitor.
21 . The apparatus of claim 20 , wherein the delta-sigma modulator comprises:
a most significant bit digital to analog converter for generating a first analog output signal for use in the generation of the most significant bits of the digital signal; and
a least significant bit digital to analog converter for generating a second analog output signal for use in the generation of the least significant bits of the digital signal.
22 . A method of generating a digital signal that is dependent on an average slope of a first current flowing through a circuit element during a sample period, the method comprising:
sensing, using a delta-sigma modulator, the first current during the sample period; and
generating, using the delta-sigma modulator, the digital signal using the sensed first current by converting the average slope of the first current into the digital signal,
wherein the average slope of the first current is an average rate of change of the first current with time.