IP Library Granted Patent US 12700797
Granted Patent B2
US 12700797 · App. 17/791,821 · Granted Aug 4, 2026

Random shifting of switching edges of a converter pulse pattern

Inventor: Markus Schäfer (Schonungen, DE)
Assignee: ZF Friedrichshafen AG
H02M1/44H02M7/5395H02P27/08
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12700797
App. No.
17/791,821
Granted
Aug 4, 2026
Kind
B2
Abstract

A method for controlling a converter includes: determining a pulse pattern for the converter, wherein the pulse pattern contains switching transitions at which an output voltage is switched between two levels; shifting switching transitions in the pulse pattern, wherein a random value is added to a point in time at which the output voltage is switched to shift the switching transitions; and applying the pulse pattern with the shifted switching transitions to switch elements in the converter to generate the output voltage.

Claims (23)

1 . A method for controlling a converter, comprising:

determining a pulse pattern for the converter, wherein the pulse pattern contains switching transitions at which an output voltage is switched between two levels, and wherein the converter comprises at least one half bridge comprising an upper switch and a lower switch, or a multi-level converter;

shifting switching transitions in the pulse pattern, wherein a random value is added to a point in time at which the output voltage is switched to shift the switching transitions;

generating a first pulse pattern for the upper switch and a second pulse pattern for the lower switch based on the pulse pattern with the shifted switching transitions, wherein a switching transition of the second pulse pattern for the lower switch is shifted in relation to an associated switching transition of the first pulse pattern for the upper switch by a dead time offset;

determining that a shifted switching transition in the pulse pattern formed by adding the random value to the point in time at which the output voltage is switched does not satisfy boundary conditions for the pulse pattern;

rolling back the shifted switching transition to a new shifted switching transition time where the boundary conditions for the pulse pattern are met; and

applying the first pulse pattern to the upper switch and applying the second pulse pattern to the lower switch to generate the output voltage.

2 . The method according to claim 1 , wherein the random value lies within a predefined range.

3 . The method according to claim 2 , wherein the predefined range extends equally in the negative and positive directions.

4 . The method according to claim 2 , wherein the random value generated in the predefined range is distributed equally.

5 . The method according to claim 1 , comprising:

adding the random value to the dead time offset.

6 . The method according to claim 5 , comprising:

adding the random value to the dead time within a set range to ensure a minimum dead time offset is maintained between a switching transition of the upper switch and a corresponding switching transition of the lower switch.

7 . The method according to claim 1 , wherein the pulse pattern is generated using a modulation process.

8 . The method according to claim 1 , wherein the output voltage of the converter comprises a plurality of phases, for each of which a pulse pattern is generated;

wherein the switching transitions in the plurality of phases are shifted independently of one another.

9 . A control system for the converter, which is configured to execute the method according to claim 1 .

10 . A motor system, comprising:

the converter,

the control system according to claim 9 , and

an electric motor, which is operated with the output voltage generated by the converter.

11 . The method according to claim 1 , wherein the dead time offset is configured to prevent short circuit of the at least one half bridge due to the upper switch and the lower switch being activated at a same time.