IP Library Granted Patent US 12700805
Granted Patent B2
US 12700805 · App. 18/493,156 · Granted Aug 4, 2026

Integrated circuit having dynamic switching control and power supply circuit including the same

Inventors: Hiroki Yamane (Matsumoto-city, JP); Shinji Matsumoto (Matsumoto-city, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H02M3/33523H02M1/0035H03K17/78
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Quick Facts
Patent No.
US 12700805
App. No.
18/493,156
Granted
Aug 4, 2026
Kind
B2
Abstract

An integrated circuit for a power supply circuit generating an output voltage of a target level from an input voltage. The integrated circuit includes: a first oscillator circuit configured to output a first oscillator signal having a first frequency corresponding to the output voltage; a second oscillator circuit configured to output a second oscillator signal having a predetermined second frequency; and a driver circuit configured to drive a transistor of the power supply circuit, in response to the first oscillator signal, after the target level of the output voltage is changed to a first level, and drive the first transistor in response to the second oscillator signal, after the target level is changed to a second level lower than the first level, and a control circuit configured to stop an operation of the first oscillator circuit, after the target level is changed to the second level.

Claims (128)

1 . An integrated circuit for a power supply circuit configured to generate an output voltage of a target level from an input voltage thereof, the target level being changeable between a first level and a second level lower than the first level, the power supply circuit including

a transformer including a primary coil, a secondary coil, and an auxiliary coil, and

a first transistor configured to control a current flowing through the primary coil, the integrated circuit being configured to drive the first transistor, the integrated circuit comprising:

a first oscillator circuit configured to output a first oscillator signal having a first frequency corresponding to the output voltage;

a second oscillator circuit configured to output a second oscillator signal having a predetermined second frequency;

a feedback voltage generating circuit configured to generate a feedback voltage according to the output voltage;

a driver circuit configured to

drive the first transistor in response to the first oscillator signal, when the target level of the output voltage is the first level and the feedback voltage fluctuates in a first voltage value range, and

drive the first transistor in response to the second oscillator signal, when the target level is the second level and the feedback voltage fluctuates in a second voltage value range; and

a control circuit configured to stop an operation of the first oscillator circuit, after the target level is changed to the second level, wherein

the first voltage value range and the second voltage value range overlap each other; and

the driver circuit is further configured to drive the first transistor in response to the first oscillator, when the target level of the output voltage is the first level in both a first period in which the feedback voltage increases and a second period in which the feedback voltage decreases.

2 . The integrated circuit according to claim 1 , wherein

the integrated circuit further includes a sense circuit that detects whether the target level is at the first level or the second level,

the sense circuit includes:

a first detection circuit comparing a first predetermined level with a power supply voltage of the integrated circuit, and

a second detection circuit comparing a second predetermined level with a current value of a first current which flows in the first transistor, and

the sense circuit detects the target level according to a first comparison result of the first detection circuit and a second comparison result of the second detection circuit.

3 . The integrated circuit according to claim 1 , wherein the second oscillator signal outputted from the second oscillator circuit has a duty cycle of 50% or less, the duty cycle being determined by a time period for turning on the first transistor relative to a period of the second oscillator signal.

4 . The integrated circuit according to claim 3 , wherein

the power supply circuit further includes a first resistor configured to detect a current flowing through the first transistor when the first transistor is on; and

the integrated circuit further includes:

a first terminal to which the first resistor is coupled, the first terminal having a first voltage that is based on the first resistor and the current flowing through the first transistor, and

a slope compensation circuit configured to generate a second voltage to compensate the first voltage, wherein

the first oscillator signal outputted from the first oscillator circuit has another duty cycle greater than 50%, said another duty cycle being determined by the time period for turning on the first transistor relative to a period of the first oscillator signal,

the driver circuit

turns on the first transistor in response to the first oscillator signal or the second oscillator signal, and

turns off the first transistor in response to the first voltage or the second voltage reaching a voltage corresponding to the output voltage, and

the control circuit stops an operation of the slope compensation circuit, after the target level is changed to the second level.

5 . The integrated circuit according to claim 4 , further comprising a second terminal configured to receive a power supply voltage corresponding to a coil voltage of the auxiliary coil, wherein

the first terminal receives a voltage corresponding to the coil voltage when the first transistor is off, and

the control circuit includes

a first detection circuit configured to detect whether the voltage at the first terminal when the first transistor is off is lower than a first predetermined level,

a second detection circuit configured to detect whether the power supply voltage at the second terminal is lower than a second predetermined level, and

a circuit configured to control the operations of the first oscillator circuit and the slope compensation circuit, based on results of detections of the first detection circuit and the second detection circuit.

6 . The integrated circuit according to claim 1 , further comprising a determination circuit configured to determine whether driving of the first transistor is to be stopped, based on the output voltage, wherein

the driver circuit includes

a driving signal output circuit configured to

output a driving signal to turn on the first transistor, in response to the first oscillator signal or the second oscillator signal, and

output the driving signal to turn off the first transistor, in response to a voltage corresponding to a current flowing through the first transistor when the first transistor is on reaching a voltage corresponding to the output voltage, and a buffer circuit configured to

stop driving of the first transistor, in response to an output from the determination circuit indicating that the driving of the first transistor is to be stopped, and

drive the first transistor based on the driving signal, in response to the output from the determination circuit indicating that the driving of the first transistor is not to be stopped; and

the control circuit stops an operation of the buffer circuit, in response to the determination circuit determining that the driving of the first transistor is stopped, after the target level is changed to the second level.

7 . The integrated circuit according to claim 6 ,

the power supply circuit further includes a second resistor having a first end and a second end, the second end being grounded; and

the integrated circuit further includes a third terminal, the third terminal being coupled to a control electrode of the first transistor and the first end of the second resistor, wherein

the buffer circuit includes

a power supply line configured to receive a voltage to turn on the first transistor,

a level shifter circuit including a second transistor, the second transistor being configured to

output a level-shift signal to turn off the first transistor, upon being turned on in response to the driving signal to turn off the first transistor,

output the level-shift signal to turn on the first transistor, upon being turned off in response to the driving signal to turn on the first transistor, and

a drive voltage output circuit configured to output, to the third terminal, a drive voltage to be applied to the control electrode of the first transistor, in response to the level-shift signal, wherein

the second transistor

outputs the level-shift signal to turn off the first transistor while passing a current from the power supply line to a ground, and

is turned off, in response to the determination circuit determining that the driving of the first transistor is stopped, after the target level is changed to the second level.

8 . The integrated circuit according to claim 1 , further comprising:

a third detection circuit configured to detect whether a power supply voltage of the integrated circuit is higher than a third predetermined level, and

a timer circuit configured to measure a predetermined time period, in response to the power supply voltage exceeding the third predetermined level, wherein

the control circuit stops the operation of the first oscillator circuit, in response to an elapse of the predetermined time period and to the target level being changed to the second level.

9 . The integrated circuit according to claim 8 , wherein the driver circuit includes

a voltage output circuit configured to output a reference voltage that changes in response to the power supply voltage exceeding the third predetermined level,

a comparator circuit configured to compare either the reference voltage or a voltage corresponding to the output voltage with a voltage corresponding to a current flowing through the first transistor, and

an on/off circuit configured to

turn on the first transistor, based on the first oscillator signal or the second oscillator signal, and

turn off the first transistor, based on a result of comparison of the comparator circuit.

10 . The integrated circuit according to claim 9 , wherein

the timer circuit is a counter configured to count the predetermined time period, based on the second oscillator signal, in response to the power supply voltage exceeding the third predetermined level,

the voltage output circuit outputs the reference voltage that rises in a stepwise manner based on a count result of the counter, and

the comparator circuit compares a lower one between the reference voltage and the voltage corresponding to the output voltage with the voltage corresponding to the current flowing through the first transistor.

11 . A power supply circuit configured to generate an output voltage from an input voltage thereof, the power supply circuit comprising:

a transformer including a primary coil, a secondary coil, and an auxiliary coil;

a first transistor configured to control a current flowing through the primary coil; and

an integrated circuit configured to drive the first transistor and to perform control such that the output voltage reaches a target level, the target level being changeable between a first level and a second level lower than the first level, the integrated circuit including

a determination circuit configured to determine whether driving of the first transistor is stopped, based on the output voltage,

an oscillator circuit configured to output an oscillator signal,

a driving signal output circuit configured to

output a driving signal to turn on the first transistor in response to the oscillator signal, and

output the driving signal to turn off the first transistor, in response to a voltage corresponding to a current flowing through the first transistor when the first transistor is on reaching a voltage corresponding to the output voltage, a buffer circuit configured to, after a delay of a predetermined time,

stop the driving of the first transistor, in response to an output from the determination circuit indicating that the driving of the first transistor is to be stopped, and

drive the first transistor, based on the driving signal, in response to the output from the determination circuit indicating that the driving of the first transistor is not to be stopped; and

a control circuit configured to

operate the buffer circuit, after the target level is changed to the first level, and

stop an operation of the buffer circuit, in response to the determination circuit determining that the driving of the first transistor is stopped, after the target level is changed to the second level.

12 . A power supply circuit configured to generate an output voltage from an input voltage thereof, the power supply circuit comprising:

a transformer including a primary coil, a secondary coil, and an auxiliary coil;

a first transistor configured to control a current flowing through the primary coil; and

an integrated circuit configured to drive the first transistor and to perform control such that the output voltage reaches a target level, the target level being changeable between a first level and a second level lower than the first level, the integrated circuit including

a first oscillator circuit configured to output a first oscillator signal having a first frequency corresponding to the output voltage,

a second oscillator circuit configured to output a second oscillator signal having a predetermined second frequency,

a feedback voltage generating circuit configured to generate a feedback voltage according to the output voltage,

a driver circuit configured to

drive the first transistor in response to the first oscillator signal, when the target level of the output voltage is the first level and the feedback voltage fluctuates in a first voltage value range, and

drive the first transistor in response to the second oscillator signal, when the target level is the second level and the feedback voltage fluctuates in a second voltage value range, and

a control circuit configured to stop an operation of the first oscillator circuit, after the target level is changed to the second level, wherein

the first voltage value range and the second voltage value range overlap each other, and

the driver circuit is further configured to drive the first transistor in response to the first oscillator, when the target level of the output voltage is the first level in both a first period in which the feedback voltage increases and a second period in which the feedback voltage decreases.

13 . The power supply circuit according to claim 12 , wherein

the integrated circuit further includes a sense circuit that detects whether the target level is at the first level or the second level,

the sense circuit includes:

a first detection circuit comparing a first predetermined level with a power supply voltage of the integrated circuit, and

a second detection circuit comparing a second predetermined level with a current value of a first current which flows in the first transistor, and

the sense circuit detects the target level according to a first comparison result of the first detection circuit and a second comparison result of the second detection circuit.

14 . An integrated circuit for a power supply circuit configured to generate an output voltage of a target level from an input voltage thereof, the target level being changeable between a first level and a second level lower than the first level, the power supply circuit including

a transformer including a primary coil, a secondary coil, and an auxiliary coil, and

a first transistor configured to control a current flowing through the primary coil, the integrated circuit being configured to drive the first transistor, the integrated circuit comprising:

a determination circuit configured to determine whether driving of the first transistor is to be stopped, based on the output voltage;

an oscillator circuit configured to output an oscillator signal;

a driving signal output circuit configured to

output a driving signal to turn on the first transistor in response to the oscillator signal, and

output the driving signal to turn off the first transistor, in response to a voltage corresponding to a current flowing through the first transistor when the first transistor is on reaching a voltage corresponding to the output voltage;

a buffer circuit configured to, after a delay of a predetermined time,

stop the driving of the first transistor, in response to an output from the determination circuit indicating that the driving of the first transistor is to be stopped, and

drive the first transistor, based on the driving signal, in response to the output from the determination circuit indicating that the driving of the first transistor is not to be stopped; and

a control circuit configured to

operate the buffer circuit after the target level is changed to the first level, and

stop an operation of the buffer circuit, in response to the determination circuit determining that the driving of the first transistor is stopped, after the target level is changed to the second level.

15 . The integrated circuit according to claim 14 ,

the power supply circuit further includes a second resistor having a first end and a second end, the second end being grounded; and

the integrated circuit further includes a terminal that is coupled to a control electrode of the first transistor and the first end of the second resistor, wherein

the buffer circuit includes

a power supply line configured to receive a voltage to turn on the first transistor,

a level shifter circuit including a second transistor, the second transistor being configured to

output a level-shift signal to turn off the first transistor, upon being turned on in response to the driving signal to turn off the first transistor,

output the level-shift signal to turn on the first transistor, upon being turned off in response to the driving signal to turn on the first transistor, and

a drive voltage output circuit configured to output, to the terminal, a drive voltage to be applied to the control electrode of the first transistor, in response to the level-shift signal, wherein

the second transistor

outputs the level-shift signal to turn off the first transistor while passing a current from the power supply line to a ground, and

is turned off, in response to the determination circuit determining that the driving of the first transistor is stopped, after the target level is changed to the second level.