IP Library › Granted Patent US 12700856

Granted Patent B2

US 12700856 · App. 18/428,966 · Granted Aug 4, 2026

Methods and apparatus to configure a device using timing

Inventors: Win N Maung (Plano, TX); Richard Edwin Hubbard (Lavon, TX); Jonathan Lee Valdez (Bedford, TX); Mark Edward Wentroble (Plano, TX); Justin Silver (San Jose, CA); Anirudh Rustagi (Cupertino, CA); Ashwin Ramachandran (Santa Clara, CA)

Assignee: TEXAS INSTRUMENTS INCORPORATED

H03K5/24 H03K21/08

View Patent ↗

Loading inventors, assignments & file history…

Monitor This Case

Get email alerts when status or documents change.

Order Certified Copies

Most orders are placed with the USPTO same day — all within 24 business hours.

Order via The Patent Place →

Pre-filled with this patent's details

Quick Facts

Patent No.: US 12700856
App. No.: 18/428,966
Granted: Aug 4, 2026
Kind: B2

External Links

USPTO Patent Center↗ Full Patent PDF↗

Abstract

An example apparatus includes: a capacitor having a terminal; comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor; timer circuitry having an input terminal and an output terminal, the input terminal of the timer circuitry coupled to the output terminal of the comparator circuitry; and configuration determination circuitry having an input and an output, the input of the configuration determination circuitry coupled to the output of the timer circuitry; and a configuration register having an input coupled to the output of the configuration determination circuitry.

Claims (85)

1 . An apparatus comprising:

a capacitor having a terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor;

timer circuitry having an input terminal and an output terminal, the input terminal of the timer circuitry coupled to the output terminal of the comparator circuitry; and

configuration determination circuitry having an input and an output, the input of the configuration determination circuitry coupled to the output of the timer circuitry; and

a configuration register having an input coupled to the output of the configuration determination circuitry.

2 . The apparatus of claim 1 , further comprising connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry.

3 . The apparatus of claim 1 , wherein the terminal of the capacitor is a first terminal, the capacitor further having a second terminal, the timer circuitry includes:

switch circuitry having a first terminal, a second terminal, and a control terminal, the first terminal of the switch circuitry coupled to a supply voltage, the second terminal of the switch circuitry coupled to the second terminal of the capacitor;

controller circuitry having an input terminal, a first output terminal, and a second output terminal, the input terminal of the controller circuitry coupled to the output terminal of the comparator circuitry, the first output terminal of the controller circuitry coupled to the control terminal of the switch circuitry; and

counter circuitry having an input terminal and an output terminal, the input terminal of the counter circuitry coupled to the second output terminal of the controller circuitry.

4 . The apparatus of claim 1 , wherein the input terminal of the configuration determination circuitry is a first input terminal, the configuration determination circuitry further having a second input terminal, the apparatus further comprising a look up table (LUT) having an output terminal coupled to the second input terminal of the configuration determination circuitry.

5 . The apparatus of claim 1 , further comprising switch circuitry having a first terminal and a second terminal, the first terminal of the switch circuitry coupled to the terminal of the capacitor, the second terminal of the switch circuitry coupled to the input terminal of the comparator circuitry.

6 . The apparatus of claim 1 , wherein the comparator circuitry includes:

an analog-to-digital converter (ADC) having an input terminal and an output terminal, the input terminal of the ADC coupled to the terminal of the capacitor; and

controller circuitry having an input terminal and an output terminal, the input terminal of the controller circuitry coupled to the output of the ADC, the output terminal of the controller circuitry coupled to the input of the timer circuitry.

7 . The apparatus of claim 6 , wherein the timer circuitry is counter circuitry having an input terminal and an output terminal, the input terminal of the counter circuitry coupled to the output of the controller circuitry.

8 . A device comprising:

peripheral circuitry including:

a capacitor having a terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor; and

timer circuitry having an input terminal coupled to the output terminal of the comparator circuitry; and

a connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry;

wherein the comparator circuitry includes:

an analog-to-digital converter (ADC) having an input terminal and an output terminal, the input terminal of the ADC coupled to the terminal of the capacitor; and

controller circuitry having an input terminal and an output terminal, the input terminal of the controller circuitry coupled to the output terminal of the ADC, the output terminal of the controller circuitry coupled to the input terminal of the timer circuitry.

9 . The device of claim 8 , wherein the timer circuitry further has an output terminal, and the peripheral circuitry further includes a configuration determination circuitry having an input terminal coupled to the output terminal of the timer circuitry.

10 . A device comprising:

first peripheral circuitry including:

a capacitor having a terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor; and

timer circuitry having an input terminal coupled to the output terminal of the comparator circuitry; and

a first connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry;

second peripheral circuitry having an input terminal, the second peripheral circuitry being another instance of the first peripheral circuitry;

a second connector having an output terminal coupled to the input terminal of the second peripheral circuitry; and

a primary device having an output coupled to the first peripheral circuitry by the first connector and the second peripheral circuitry by the second connector.

11 . A device comprising:

peripheral circuitry including:

a capacitor having a terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor;

timer circuitry having input and output terminals, the input terminal of the timer circuitry coupled to the output terminal of the comparator circuitry; and

configuration determination circuitry having a first input terminal and a second input terminal, wherein the first input terminal coupled to the output terminal of the timer circuitry;

a connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry; and

a look up table (LUT) having an output terminal coupled to the second input terminal of the configuration determination circuitry.

12 . A device comprising:

peripheral circuitry including:

a capacitor having a first terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor; and

timer circuitry having an input terminal coupled to the output terminal of the comparator circuitry; and

a connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry, the timer circuitry further including:

switch circuitry having a first terminal, a second terminal, and a control terminal, the first terminal of the switch circuitry coupled to the second terminal of the capacitor, the second terminal of the switch circuitry coupled to a supply voltage;

counter circuitry having an input terminal and an output terminal, the input terminal of the counter circuitry coupled to the second output terminal of the controller circuitry.

13 . A device comprising:

peripheral circuitry including:

a capacitor having a terminal;

comparator circuitry having an input terminal and an output terminal, the input terminal of the comparator circuitry coupled to the terminal of the capacitor; and

counter circuitry having an input terminal and an output terminal, the input terminal of the counter circuitry coupled to the output terminal of the comparator circuitry;

a connector including a resistor having a terminal coupled to the terminal of the capacitor and the input terminal of the comparator circuitry; and

configuration determination circuitry having an input coupled to the output terminal of the counter circuitry.

14 . The device of claim 13 , wherein the comparator circuitry includes:

an analog-to-digital converter (ADC) having an input terminal and an output terminal, the input terminal of the ADC coupled to the terminal of the capacitor; and

15 . An apparatus comprising:

a capacitor;

comparator circuitry coupled to the capacitor, the comparator circuitry configured to compare a voltage at the capacitor to a threshold voltage;

timer circuitry coupled to the comparator circuitry, the timer circuitry configured to determine a time that the voltage of the capacitor is equal to the threshold voltage;

configuration determination circuitry coupled to the timer circuitry, the configuration determination circuitry configured to determine a configuration responsive to determining the time; and

a configuration register coupled to the configuration determination circuitry, the configuration register configured to determine an address of the apparatus.

16 . The apparatus of claim 15 , further comprising a connector coupled to the capacitor, the connector configured to be coupled to a controller area network (CAN) BUS, wherein the apparatus is configured to transmit or receive data using the CAN BUS.

17 . An apparatus comprising:

a capacitor;

comparator circuitry coupled to the capacitor, the comparator circuitry configured to compare a voltage at the capacitor to a threshold voltage;

timer circuitry coupled to the comparator circuitry, the timer circuitry configured to determine a time that the voltage of the capacitor is equal to the threshold voltage; and

configuration determination circuitry coupled to the timer circuitry, the configuration determination circuitry configured to determine a configuration responsive to determining the time, wherein the timer circuitry is further configured to:

start incrementing a reference count responsive to beginning to discharge the capacitor; and

stop incrementing the reference count responsive to the voltage of the capacitor being equal to the threshold voltage, the reference count represents the time.

18 . The apparatus of claim 17 , further comprising a configuration register coupled to the configuration determination circuitry, the configuration register configured to determine an address of the apparatus.

19 . An apparatus comprising:

a capacitor;

comparator circuitry coupled to the capacitor, the comparator circuitry configured to compare a voltage at the capacitor to a threshold voltage;

timer circuitry coupled to the comparator circuitry, the timer circuitry configured to determine a time that the voltage of the capacitor is equal to the threshold voltage, wherein the time represents a count value of counter circuitry;

configuration determination circuitry coupled to the timer circuitry, the configuration determination circuitry configured to determine a configuration responsive to determining the time; and

a look up table (LUT) having a plurality of configurations of the apparatus, each one of the plurality of configurations corresponds to range of possible count values.

20 . The apparatus of claim 19 , wherein the configuration determination circuitry further configured to determine the configuration by selecting one of the plurality of configurations of the apparatus that corresponds to the time.