IP Library Granted Patent US 12700893
Granted Patent B2
US 12700893 · App. 18/633,022 · Granted Aug 4, 2026

Self-interference, echo and crosstalk mitigation in multi-lane interconnects

Inventors: Shalabh Gupta (Mumbai, IN); Ganpat Anant Parulekar (Mumbai, IN); Sandeep Goyal (Delhi, IN)
Assignee: INDIAN INSTITUTE OF TECHNOLOGY BOMBAY (IIT BOMBAY)
H04B3/32H04B3/487
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12700893
App. No.
18/633,022
Granted
Aug 4, 2026
Kind
B2
Abstract

Embodiments disclosed herein provides a method for mitigating an interference signal in a multi-lane interconnect. The method includes transmitting, by a first device ( 101 ), a first signal using a MLD ( 504 ) to a second device ( 103 ) on a first transmission line of the multi-lane interconnect between the first device ( 101 ) and the second device ( 102 ). The method includes receiving a second signal transmitted from the second device ( 102 ) on the first transmission line while simultaneously transmitting the first signal to the second device ( 102 ) on the first transmission line. Further, the method includes adjusting the plurality of impedances such that an input impedance (Zin) seen into the first device from the first transmission line matches the characteristic impedance (Z 0 ) of the first transmission line. One or more transconductance cells or driver cells in the RD are tuned for cancellation or suppression of interference signals at a RFE ( 505 ) input.

Claims (34)

1 . A method for mitigating an interference signal in a multi-lane interconnect comprising:

transmitting, by a first device, a first signal using a Main Line Driver (MLD) to a second device on a first transmission line of the multi-lane interconnect between the first device and the second device, wherein the multi-lane interconnect is associated with one of a single-ended transmission line circuit and differential-ended transmission line circuit between the first device and the second device;

receiving, by the first device, a second signal transmitted from the second device on the first transmission line while simultaneously transmitting the first signal to the second device on the first transmission line, wherein a signal at a Receiver Frontend (RFE) input of the first device comes through a ratioed impedance circuit of the first device and comprises the second signal and the interference signal;

adjusting, by the first device, a plurality of impedances such that an input impedance (Z in ) seen into the first device from the first transmission line matches a characteristic impedance (Z 0 ) of the first transmission line; and

tuning, by the first device, a Ratioed Driver (RD) of the first device to cancel or suppress at least a Self-Interference (SI) at the RFE input of the first device caused by the first signal.

2 . The method as claimed in claim 1 , wherein echoes of the first signal are also suppressed by the RD by generating delayed replicas of the first signal, and scaling and adding the delayed replicas to the RFE input of the first device.

3 . The method as claimed in claim 1 , wherein a Near End Cross Talk (NEXT) caused by at least one or more signals transmitted in adjacent lanes are also suppressed by the RD by generating at least one of an original, and delayed replicas of the one or more signals transmitted in the adjacent lane, and scaling and adding the generated signals to the RFE input of the first device.

4 . The method as claimed in claim 1 , wherein the MLD comprises a plurality of transconductance cells or driver cells each of which is driven by a signal to be transmitted or a signal's delayed replica, wherein the transconductance cells or driver cells are tunable.

5 . The method as claimed in claim 1 , wherein the MLD is configured to transmit a Pulse Amplitude Modulation (PAM) signal with two bits represented by a Most Significant Bit (MSB) and Least Significant Bit (LSB).

6 . The method as claimed in claim 1 , wherein the RD provides a lower current or a lower power than the MLD to generate the RD output to cancel or suppress the SI.

7 . The method as claimed in claim 1 , wherein the first device performs transmit side pre-emphasis equalization by generating a signal to be transmitted and its delayed replicas using multiple transconductance cells or driver cells in the MLD.

8 . The method as claimed in claim 1 , wherein cancelling or suppressing, by the first device, the interference signal at the RFE input of the first device comprises:

correlating, by the first device, the RFE output with the at least one of an original and delayed replicas of the first signal to adjust one or more weight coefficients to tune strengths of one or more of transconductance cells or driver cells in the RD adaptively.

9 . The method as claimed in claim 1 , wherein cancelling or suppressing, by the first device, the interference signal at the RFE input of the first device also comprises:

correlating, by the first device, the RFE output with at least one of original and delayed replicas of a signal transmitted by the first device in adjacent lanes to adjust weight coefficients to tune strengths of one or more of transconductance cells or driver cells in the RD adaptively to cancel or suppress Near End Cross Talk (NEXT).

10 . A system for mitigating an interference signal in a multi-lane interconnect, comprises:

a first device comprising a plurality of transceivers, and a ratioed impedance controller;

a second device comprising a plurality of transceivers, and a ratioed impedance controller;

a multi-lane interconnect circuit connecting the first device with the second device using a multi-lane interconnect, wherein the multi-lane interconnect circuit is one of a single-ended transmission line circuit and differential-ended transmission line circuit between the first device and the second device, wherein the multi-lane interconnect circuit is configured to transmit a first signal to the second device on a first transmission line of the multi-lane interconnect;

wherein a ratioed impedance controller of the first device is configured to:

transmit the first signal using a Main Line Driver (MLD) to the second device on the first transmission line of the multi-lane interconnect between the first device and the second device;

receive a second signal transmitted from the second device on the first transmission line while simultaneously transmitting the first signal to the second device on the first transmission line, wherein a signal at a Receiver Frontend (RFE) input of the first device comes through a ratioed impedance circuit of the first device and comprises the second signal and the interference signal;

adjust a plurality of impedances such that an input impedance (Z in ) seen into the first device from the first transmission line matches a characteristic impedance (Z 0 ) of the first transmission line; and

tune a Ratioed Driver (RD) of the first device to cancel or suppress at least a Self-Interference (SI) at the RFE input of the first device caused by the first signal.

11 . The system as claimed in claim 10 , wherein echoes of the first signal are also suppressed by the RD by generating delayed replicas of the first signal, and scaling and adding the delayed replicas to the RFE input of the first device.

12 . The system as claimed in claim 10 , wherein a Near End Cross Talk (NEXT) caused by at least one or more signals transmitted in adjacent lanes are also suppressed by the RD by generating at least one of an original, and delayed replicas of the one or more signals transmitted in the adjacent lanes, and scaling and adding the generated signals to the RFE input of the first device.

13 . The system as claimed in claim 10 , wherein the MLD comprises a plurality of transconductance cells or driver cells each of which is driven by a signal to be transmitted or a signal's delayed replica, wherein the transconductance cells or driver cells are tunable.

14 . The system as claimed in claim 10 , wherein the MLD is configured to transmit a Pulse Amplitude Modulation (PAM) signal with two bits represented by a Most Significant Bit (MSB) and Least Significant Bit (LSB).

15 . The system as claimed in claim 10 , wherein the RD provides a lower current or a lower power than the MLD to generate the RD output to cancel or suppress the SI.

16 . The system as claimed in claim 10 , wherein the first device performs transmit side pre-emphasis equalization by generating a signal to be transmitted and its delayed replicas using multiple transconductance cells or driver cells in the MLD.

17 . The system as claimed in claim 10 , wherein cancelling or suppressing the interference signal at the RFE input of the first device comprises:

correlating the RFE output with the at least one of a original and delayed replicas of the first signal to adjust one or more weight coefficients to tune strengths of one or more of transconductance cells or driver cells in the RD adaptively.

18 . The system as claimed in claim 10 , wherein cancelling or suppressing the interference signal at the RFE input of the first device also comprises:

correlating the RFE output with at least one of an original and delayed replicas of a signal transmitted by the first device in adjacent lanes to adjust weight coefficients to tune strengths of one or more of transconductance cells or driver cells in the RD adaptively to cancel or suppress Near End Cross Talk (NEXT).