Method and system for robust streaming of data
View Patent ↗A method and system for providing robust streaming of data from a multi-core die is disclosed. The techniques include using a high bandwidth memory (HBM) device as retransmit buffers for large amounts of data to ensure robust communication in relatively high round trip-transmission time (RTT) transmission. Another technique is supporting two or more Ethernet ports between components to both transmit the same data packets on the two ports to insure robustness. Another technique is to use sequence numbers and send data packets from the different ports in a round robin fashion and reorder the packets upon receipt of an external device. Another technique is dynamically adding and removing paths for data packets between devices with multiple ports based on the quality of the path.
1 . A die comprising:
a plurality of processing cores;
an external memory interface in communication with an external memory device;
a first port;
a high speed interconnection with another die with a plurality of processing cores and a second port;
an interface logic for receiving data from the plurality of processing cores, the interface logic coupled to the high speed interconnection; the interface logic communicating to an external device via the first port or the second port;
a distribution controller operable to:
divide a data stream from at least one of the plurality of processing cores into data packets;
assign a sequence number to each of the data packets;
store a copy of each of the data packets in the external memory device;
send the data packets to the external device through a communication media access controller via allocating each of the data packets to either be sent through the first port or sent through the interface logic and high speed interconnection to the second port;
receive a signal indicating that a data packet has not been successfully received by the external device; and
retransmit the data packet from the external memory device.
2 . The die of claim 1 , further comprising a third port, wherein each of the data packets are allocated to one of the first port, second port or third port by the distribution controller.
3 . The die of claim 1 , wherein the first port is an Ethernet port.
4 . The die of claim 1 , further comprising retransmitter logic operable to determine failure on the first or second port and marking the determined port as not available for traffic.
5 . The die of claim 4 , wherein the data packets are rerouted to the first or second port that is not marked as not available for traffic.
6 . The die of claim 5 , wherein the retransmitter logic is operable to:
send a background connectivity message on the first or second port that is marked as not available for traffic;
determine whether the first or second port marked as not available for traffic has recovered; and
wherein the distribution controller reroutes the data packets to either the first or second port when a determination that the first or second port has recovered.
7 . The die of claim 4 , wherein the retransmitter logic determines failure of the first or second port by counting failures on each port and comparing the number of failures to a threshold value.
8 . The die of claim 1 , wherein the high speed interconnection is an Interlaken connection.
9 . The die of claim 1 , wherein the distribution controller is operable to allocate at least one the data packets to be sent through the first port and allocate at least another one of the data packets to be sent to the second port through the interface logic and high speed interconnection.
10 . A processing system comprising:
a first die including:
at least one processing core;
a first port;
a high speed interconnection; and
a first interface logic for receiving data from the at least one processing core, the first interface logic coupled to the first port; and
a second die including:
at least one processing core coupled to the high speed interconnection;
a second port; and
a distribution controller on the first die coupled the first interface logic, the distribution controller operable to:
divide a data stream from the at least one processing core of the first die into data packets; and
send the data packets to an external device through a first communication media access controller via allocating each of the data packets to either be sent through the first port or sent through the interface logic and high speed interconnection to the second port.
11 . The system of claim 10 , further comprising a memory device, wherein the distribution controller is further operable to:
assign a sequence number to each of the data packets;
store a copy of each of the data packets in the memory device;
receive a signal indicating that a data packet has not been successfully received by the external device; and
retransmit the data packet from the memory device.
12 . The system of claim 10 , wherein the first die includes a third port, wherein each of the data packets are allocated to one of the first port, second port or third port by the distribution controller.
13 . The system of claim 10 , wherein the first port is an Ethernet port.
14 . The system of claim 10 , further comprising retransmitter logic operable to determine failure on the first or second port and marking the determined port as not available for traffic.
15 . The system of claim 10 , wherein the data packets are rerouted to the first or second port that is not marked as not available for traffic.
16 . The system of claim 15 , wherein the retransmitter logic determines failure of the first or second port by counting failures on each port and comparing the number of failures to a threshold value.
17 . The system of claim 16 , wherein the retransmitter logic is operable to:
send a background connectivity message on the first or second port that is marked as not available for traffic;
determine whether the first or second port marked as not available for traffic has recovered; and
wherein the distribution controller reroutes the data packets to either the first or second port when a determination that the first or second port has recovered.
18 . The system of claim 10 , wherein the high speed interconnection is an Interlaken connection.
19 . The system of claim 10 , further comprising a switch coupled to the first and second port, the switch coupled to the external device.
20 . The system of claim 10 , wherein the distribution controller is operable to allocate at least one the data packets to be sent through the first port and allocate at least another one of the data packets to be sent to the second port through the first interface logic and high speed interconnection.