Solid-state imaging element, imaging device, and method for controlling solid-state imaging element

1 . A solid-state imaging element, comprising:

a comparison unit configured to:

compare a signal level with a set of thresholds, wherein the signal level corresponds to an exposure amount associated with an exposure of a pixel of the solid-state imaging element; and

output a comparison result based on the comparison of the signal level with the set of thresholds;

a pre-stage circuit configured to:

select a conversion efficiency from a plurality of conversion efficiencies based on the comparison result;

convert charges into a first voltage at the selected conversion efficiency; and

output the first voltage based on the conversion;

a capacitor unit configured to hold the first voltage, wherein the capacitor unit includes a first capacitor element and a second capacitor element;

a selection circuit configured to sequentially execute control to:

connect one of the first capacitor element or the second capacitor element to a post-stage node;

disconnect each of the first capacitor element and the second capacitor element from the post-stage node; and

connect other of the one of the first capacitor element or the second capacitor element to the post-stage node;

a post-stage reset transistor configured to initialize a level of the post-stage node based on the disconnection of each of the first capacitor element and the second capacitor element from the post-stage node; and

a post-stage circuit configured to:

read the held first voltage via the post-stage node; and

output a second voltage to a vertical signal line based on the read of the first voltage.

2 . The solid-state imaging element according to claim 1 , wherein

the pre-stage circuit is further configured to select one of a first conversion efficiency of the plurality of conversion efficiencies or a second conversion efficiency of the plurality of conversion efficiencies, and

the comparison unit includes a comparator configured to compare the signal level with the set of thresholds.

3 . The solid-state imaging element according to claim 1 , wherein

the pre-stage circuit is further configured to select one of a first conversion efficiency of the plurality of conversion efficiencies, a second conversion efficiency of the plurality of conversion efficiencies, or a third conversion efficiency of the plurality of conversion efficiencies,

the set of thresholds includes a first threshold and a second threshold,

the first threshold is different from the second threshold, and

the comparison unit includes:

a first comparator configured to compare the signal level with the first threshold; and

a second comparator configured to compare the signal level with the second threshold.

4 . The solid-state imaging element according to claim 1 , wherein

the first voltage is one of a reset level or the signal level,

the comparison unit is further configured to compare an output signal level with the set of thresholds, and

the output signal level corresponds to the second voltage that is output through the vertical signal line.

5 . The solid-state imaging element according to claim 1 , wherein

the first voltage one of a reset level or the signal level,

the comparison unit is further configured to compare an output signal level with the set of thresholds, and

the output signal level corresponds to the first voltage that is output from the pre-stage circuit.

6 . The solid-state imaging element according to claim 1 , wherein the pre-stage circuit includes:

a photoelectric conversion element configured to generate the charges by photoelectric conversion; and

a pre-stage transfer transistor configured to transfer the charges from the photoelectric conversion element to a floating diffusion layer.

7 . The solid-state imaging element according to claim 6 , wherein the pre-stage circuit further includes:

an additional capacitor; and

a conversion efficiency control transistor configured to open and close a path between the floating diffusion layer and the additional capacitor based on the comparison result.

8 . The solid-state imaging element according to claim 6 , wherein

the comparison result includes a first comparison result,

the solid-state imaging element further comprises a comparator configured to output a second comparison result, and

the pre-stage circuit further includes:

an additional capacitor;

a first conversion efficiency control transistor configured to open and close a first path between the floating diffusion layer and a specific node based on the first comparison result; and

a second conversion efficiency control transistor configured to open and close a second path between the specific node and the additional capacitor based on the second comparison result.

9 . The solid-state imaging element according to claim 1 , wherein

the pre-stage circuit includes:

a photoelectric conversion element;

a pre-stage transfer transistor configured to transfer the charges from the photoelectric conversion element to a floating diffusion layer;

a first reset transistor configured to initialize the floating diffusion layer; and

a pre-stage amplification transistor configured to:

amplify a third voltage of the floating diffusion layer; and

output the first voltage to a pre-stage node based on the amplification of the third voltage,

a first end of each of the first capacitor element and the second capacitor element is connected to the pre-stage node, and

a second end of the each of the first capacitor element and the second capacitor element is connected to the selection circuit.

10 . The solid-state imaging element according to claim 9 , further comprising a switching unit configured to:

adjust a source voltage; and

supply the adjusted source voltage to a source of the pre-stage amplification transistor, wherein

the pre-stage circuit further includes a current source transistor connected to a drain of the pre-stage amplification transistor, and

the current source transistor shifts from an on state to an off state based on an end of an exposure period of the exposure of the pixel.

11 . The solid-state imaging element according to claim 10 , further comprising a regulator configured to generate a generated voltage, wherein the switching unit is further configured to:

supply a power supply voltage as the source voltage during the exposure period; and

supply the generated voltage as the source voltage after the end of the exposure period, wherein the generated voltage is different from the power supply voltage.

12 . The solid-state imaging element according to claim 9 , further comprising a control circuit configured to control a reset power supply voltage of the pre-stage circuit, wherein

the first reset transistor configured to initialize the third voltage of the floating diffusion layer to the reset power supply voltage,

the control circuit is further configured to set, during a read period, the reset power supply voltage to a fourth voltage,

the fourth voltage is different from a value of the reset power supply voltage during an exposure period of the exposure of the pixel, and

a reset level of the floating diffusion layer and the signal level are read in the read period.

13 . The solid-state imaging element according to claim 1 , further comprising:

a first chip that includes the pre-stage circuit; and

a second chip that includes the capacitor unit and the post-stage circuit.

14 . The solid-state imaging element according to claim 13 , further comprising an analog to digital converter configured to sequentially convert the second voltage into a digital signal, wherein

the second voltage is output through the vertical signal line, and

the second chip includes the analog to digital converter.

15 . The solid-state imaging element according to claim 13 , further comprising:

an analog to digital converter configured to sequentially convert the second voltage into a digital signal, wherein the second voltage is output through the vertical signal line; and

a third chip that includes the analog to digital converter.

16 . An imaging device, comprising:

a comparison unit configured to:

compare a signal level with a threshold, wherein the signal level corresponds to an exposure amount associated with an exposure of a pixel of the imaging device; and

output a comparison result based on the comparison of the signal level with the threshold;

a pre-stage circuit configured to:

select a conversion efficiency from a plurality of conversion efficiencies based on the comparison result;

convert charges into a first voltage at the selected conversion efficiency; and

output the first voltage based on the conversion;

a capacitor unit configured to hold the first voltage, wherein the capacitor unit includes a first capacitor element and a second capacitor element;

a selection circuit configured to sequentially execute control to:

connect one of the first capacitor element or the second capacitor element to a post-stage node;

disconnect each of the first capacitor element and the second capacitor element from the post-stage node; and

connect other of the one of the first capacitor element or the second capacitor element to the post-stage node;

a post-stage reset transistor configured to initialize a level of the post-stage node based on the disconnection of each of the first capacitor element and the second capacitor element from the post-stage node;

a post-stage circuit configured to:

read the held first voltage via the post-stage node; and

output a second voltage to a vertical signal line based on the read of the first voltage, wherein the second voltage is output as a pixel signal; and

a signal processing circuit configured to execute a signal processing operation on the pixel signal.

17 . A method for controlling a solid-state imaging element, the method comprising:

controlling a comparison unit to:

compare a signal level with a threshold, wherein the signal level corresponds to an exposure amount associated with an exposure of a pixel of the solid-state imaging element; and

output a comparison result based on the comparison of the signal level with the threshold;

controlling a pre-stage circuit to:

select a conversion efficiency from a plurality of conversion efficiencies based on the comparison result;

convert charges into a first voltage at the selected conversion efficiency; and

output the first voltage based on the conversion;

controlling a capacitor unit to hold the first voltage, wherein the capacitor unit includes a first capacitor element and a second capacitor element;

controlling a selection circuit to sequentially execute control to:

connect one of the first capacitor element or the second capacitor element to a post-stage node;

disconnect each of the first capacitor element and the second capacitor element from the post-stage node; and

connect other of the one of the first capacitor element or the second capacitor element to the post-stage node;

controlling a post-stage reset transistor to initialize a level of the post-stage node based on the disconnection of the each of the first capacitor element and the second capacitor element from the post-stage node; and

controlling a post-stage circuit to:

read the held first voltage via the post-stage node; and

output a second voltage to a vertical signal line based on the read of the first voltage.