IP Library Granted Patent US 12701661
Granted Patent B2
US 12701661 · App. 18/156,373 · Granted Aug 4, 2026

Component carrier with connected component having redistribution layer at main surface

Inventors: Artan Baftiri (Chongqing, CN); Jeesoo Mok (Chongqing, CN)
Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft
H05K1/181H05K1/185H05K3/303
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Quick Facts
Patent No.
US 12701661
App. No.
18/156,373
Granted
Aug 4, 2026
Kind
B2
Abstract

A component carrier includes a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure and a component connected to the stack. The component has a planar redistribution layer at a main surface thereof.

Claims (38)

1 . A component carrier, comprising:

a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure; and

a component connected to the stack;

wherein the component has a planar redistribution layer at a main surface thereof,

wherein the planar redistribution layer comprises a plurality of electrically conductive traces being at least partly linear extending in and along the main surface of the component,

wherein adjacent electrically conductive traces extend partially parallel to each other, and

wherein the electrically conductive traces comprise a diverging section at which the electrically conductive traces diverge from each other such that a mutual distance between the adjacent electrically conductive traces is increasing.

2 . The component carrier according to claim 1 , wherein the component is embedded in the stack.

3 . The component carrier according to claim 1 , wherein the planar redistribution layer extends within a horizontal plane.

4 . The component carrier according to claim 1 , wherein the stack comprises a further planar redistribution layer.

5 . The component carrier according to claim 4 , wherein the further planar redistribution layer extends within a horizontal plane.

6 . The component carrier according to claim 4 , wherein the planar redistribution layer and the further planar redistribution layer are electrically coupled with each other.

7 . The component carrier according to claim 4 , further comprising at least one of the following features:

wherein a main surface of the planar redistribution layer is directly connected with a main surface of the further planar redistribution layer at a common horizontal plane;

wherein a flat connection pad is between the planar redistribution layer and the further planar redistribution layer;

wherein the planar redistribution layer and the further planar redistribution layer are directly connected with each other;

wherein the further planar redistribution layer has a smaller integration density than the planar redistribution layer;

wherein the further planar redistribution layer has a larger line space ratio than the planar redistribution layer.

8 . The component carrier according to claim 4 , wherein the planar redistribution layer comprises a plurality of linear electrically conductive trace portions, each connecting component contact areas in one extremity, and the further planar redistribution layer comprises further linear electrically conductive trace portions, at least one of said further linear electrically conductive trace portions being electrically connected to an extremity of the at least one linear electrically conductive trace portion, wherein distances between said linear electrically conductive trace portions are smaller than distances between said further electrically conductive linear trace portions.

9 . The component carrier according to claim 1 , wherein the electrically conductive traces being at least partly linear, comprise a parallel section along which the electrically conductive traces extend parallel to each other.

10 . The component carrier according to claim 1 , wherein the electrically conductive traces extend in an area of the main surface between pads at the main surface of the component.

11 . The component carrier according to claim 1 , comprising:

a further component connected to the stack and arranged laterally with respect to the component at the same vertical level.

12 . The component carrier according to claim 11 , wherein the further component has another planar redistribution layer at a main surface thereof.

13 . The component carrier according to claim 11 , wherein the component and the further component are electrically coupled with each other along a horizontal connection line.

14 . The component carrier according to claim 11 , wherein the component and the further component are electrically coupled with each other by a bridge die arranged between the component and the further component.

15 . The component carrier according to claim 1 , wherein the planar redistribution layer provides electric connections in two orthogonal directions.

16 . The component carrier according to claim 15 , wherein the stack comprises a further planar redistribution layer, and wherein the planar redistribution layer and the further planar redistribution layer are electrically coupled with each other in the two orthogonal directions.

17 . The component carrier according to claim 1 , wherein the planar redistribution layer at the main surface of the component is formed by one or more patterned electrically conductive layers.

18 . A method of manufacturing a component carrier, comprising:

providing a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure;

connecting a component to the stack; and

providing the component with a planar redistribution layer at a main surface thereof before the connecting,

wherein the planar redistribution layer comprises a plurality of electrically conductive traces being at least partly linear extending in and along the main surface of the component,

wherein adjacent electrically conductive traces extend partially parallel to each other, and

wherein the electrically conductive traces comprise a diverging section at which the electrically conductive traces diverge from each other such that a mutual distance between the adjacent electrically conductive traces is increasing.

19 . The method according to claim 18 , further comprising:

embedding the component in the stack.