Wiring substrate, method of trimming same, and multi-layered wiring board
There is provided a wiring substrate whose mechanical strength, water resistance, humidity resistance, and product yield can be improved. This wiring substrate includes a device region in which a main wiring pattern composed of a metal layer is embedded in an insulating layer; a peripheral region which surrounds a periphery of the device region and in which a dummy wiring pattern composed of a metal layer is embedded in an insulating layer; and an insulating boundary region interposed between the device region and the peripheral region, composed of an insulating layer. The insulating boundary region has a winding shape in which it is possible to draw a virtual straight line alternately traversing the metal layer constituting the dummy wiring pattern and the insulating layer constituting the insulating boundary region, parallel to an inscribed line of at least one side of an outer edge of the device region.
1 . A wiring substrate comprising:
a device region in which a main wiring pattern composed of a metal layer is embedded in an insulating layer, the main wiring pattern having peaks and valleys provided within the device region;
a peripheral region which surrounds a periphery of the device region and in which a dummy wiring pattern composed of a metal layer electrically independent of the main wiring pattern is embedded in an insulating layer, the dummy wiring pattern having peaks and valleys provided within the peripheral region, and wherein peaks of the main wiring pattern extend into valleys of the dummy wiring pattern, and peaks of the dummy wiring pattern extend into valleys of the main wiring pattern; and
an insulating boundary region interposed between the device region and the peripheral region, composed of an insulating layer, and free from a metal layer,
wherein the insulating boundary region has a winding shape in which it is possible to draw a virtual straight line alternately traversing the metal layer constituting the dummy wiring pattern and the insulating layer constituting the insulating boundary region, parallel to an inscribed line of at least one side of an outer edge of the device region, when the wiring substrate is seen in a planar view, wherein the peripheral region is a disposal margin configured to be removed by cutting along the virtual straight line such that the device region remains surrounded by the insulating boundary region, and
wherein the device region is completely separated from the virtual straight line by the insulating boundary region when the wiring substrate is seen in a planar view.
2 . The wiring substrate according to claim 1 , wherein the insulating boundary region has a winding shape in which it is possible to draw a virtual straight line alternately traversing the metal layer constituting the dummy wiring pattern and the insulating layer constituting the insulating boundary region, parallel to an inscribed line of each of all sides of an outer edge of the device region, when the wiring substrate is seen in a planar view, and wherein the device region is completely separated from the virtual straight lines for the all sides by the insulating boundary region when the wiring substrate is seen in a planar view.
3 . The wiring substrate according to claim 1 , wherein the winding shape is composed so that an outer edge shape of the peripheral region in contact with the insulating boundary region, and/or an outer edge shape of the device region in contact with the insulating boundary region comprise at least one selected from the group consisting of a comb shape, a wave shape composed of a curve, a triangle, a trapezoid, a spindle shape, and a fastener shape.
4 . The wiring substrate according to claim 1 , wherein the winding shape comprises a wavy pattern.
5 . The wiring substrate according to claim 4 , wherein the wavy pattern comprises at least one shape selected from the group consisting of a sine wave, a saw wave, a rectangular wave, a trapezoidal wave, and a triangular wave.
6 . The wiring substrate according to claim 1 , wherein a coefficient of linear expansion of a metal constituting the metal layer of the main wiring pattern is 0.10 times or more and 10 times or less a coefficient of linear expansion of a resin constituting the insulating layer of the insulating boundary region.
7 . The wiring substrate according to claim 1 , wherein the wiring substrate has a carrier and a release layer on the carrier, and comprises the device region, the peripheral region, and the insulating boundary region on the release layer.
8 . The wiring substrate according to claim 7 , wherein the carrier is a glass carrier.
9 . A multilayer wiring board comprising the wiring substrate according to claim 1 .
10 . A method for trimming a wiring substrate, comprising:
providing the wiring substrate according to claim 1 ; and
cutting the wiring substrate along the virtual straight line to remove the peripheral region.