Ferroelectric semiconductor device
A semiconductor device including a substrate, an interfacial layer on the substrate, a ferroelectric layer on the interfacial layer, a gate on the ferroelectric layer, and the nitride protective layer between the interfacial layer and the gate and being adjacent to the ferroelectric layer.
1 . A semiconductor device comprising:
a substrate;
an interfacial layer on the substrate;
a ferroelectric layer on the interfacial layer;
a gate on the ferroelectric layer; and
a nitride protective layer between the interfacial layer and the gate, the nitride protective layer being adjacent to the ferroelectric layer,
wherein the nitride protective layer includes a ferroelectric material as a base material and further includes nitrogen (N), and
a first content of the nitrogen (N) included in the nitride protective layer is greater than 0 at % and less than 6 at % relative to a second content of a transition metal included in the ferroelectric material.
2 . The semiconductor device of claim 1 , wherein the ferroelectric material includes at least one of hafnium oxide, zirconium oxide, or hafnium-zirconium oxide.
3 . The semiconductor device of claim 1 , wherein the first content of the nitrogen (N) included in the nitride protective layer is 1 at % or more and 5 at % or less relative to the second content of the transition metal included in the ferroelectric material.
4 . The semiconductor device of claim 1 , wherein the transition metal includes hafnium (Hf).
5 . The semiconductor device of claim 1 , wherein the nitride protective layer has a thickness of greater than 0 nm and less than 3.5 nm.
6 . The semiconductor device of claim 1 , wherein a thickness of the nitride protective layer is 50% or less of a thickness of the ferroelectric layer.
7 . The semiconductor device of claim 1 , wherein the nitride protective layer is between the ferroelectric layer and the gate.
8 . The semiconductor device of claim 1 , wherein the nitride protective layer is between the interfacial layer and the ferroelectric layer.
9 . The semiconductor device of claim 1 , wherein the nitride protective layer includes:
a first nitride protective layer between the ferroelectric layer and the gate; and
a second nitride protective layer between the interfacial layer and the ferroelectric layer.
10 . The semiconductor device of claim 1 , wherein the ferroelectric layer includes at least one of hafnium oxide, zirconium oxide, or hafnium-zirconium oxide.
11 . The semiconductor device of claim 10 , wherein the ferroelectric layer further includes a dopant of at least one of Sr, La, Al, Si, Gd, or Y.
12 . The semiconductor device of claim 1 , wherein a thickness of the ferroelectric layer is 4 nm or more and 20 nm or less.
13 . The semiconductor device of claim 1 , wherein a memory window is 0.5 V or more.
14 . A semiconductor device comprising:
a substrate;
an interfacial layer on the substrate;
a ferroelectric layer on the interfacial layer, the ferroelectric layer comprising nitrogen and at least one of hafnium oxide, zirconium oxide, or hafnium-zirconium oxide; and
a gate on the ferroelectric layer,
wherein a content of nitrogen in the ferroelectric layer is greater than 0 at % and less than 6 at % relative to a content of a transition metal included in the ferroelectric layer.
15 . The semiconductor device of claim 14 , wherein the ferroelectric layer includes hafnium, and the content of nitrogen is 1 at % or more and 5 at % or less relative to a content of hafnium.
16 . The semiconductor device of claim 14 , wherein the nitrogen is present in a certain region inside the ferroelectric layer, and the certain region includes at least one of a first region adjacent to the gate or a second region adjacent to the interfacial layer.
17 . The semiconductor device of claim 16 , wherein a thickness of the certain region inside the ferroelectric layer is 50% or less of a total thickness of the ferroelectric layer.
18 . The semiconductor device of claim 1 , wherein there is no intervening layer between the nitride protective layer and the ferroelectric layer.
19 . A semiconductor device comprising:
a substrate;
an interfacial layer on the substrate;
a ferroelectric layer on the interfacial layer;
a gate on the ferroelectric layer; and
a nitride protective layer between the ferroelectric layer and the gate, wherein the nitride protective layer includes a ferroelectric material as a base material and further includes nitrogen (N), and
a first content of the nitrogen (N) included in the ferroelectric layer is less than a second content of the nitrogen (N) included in the nitride protective layer.