Semiconductor device, manufacturing method thereof, and 3D NAND memory
This disclosure provides a semiconductor device, a method of manufacturing the same, a 3D NAND memory, and a memory system. The semiconductor device includes a substrate having a first trench at a surface thereof, and a first insulating layer formed on the surface of the substrate and inside the first trench. The first insulating layer formed inside the first trench forms a second trench that is embedded in the first trench. The semiconductor device further includes a conducting layer formed on a surface of the first insulating layer away from the substrate and inside the second trench.
1 . A semiconductor device, comprising:
a substrate having a first trench at a surface thereof;
a first insulating layer formed on the surface of the substrate and inside the first trench, the first insulating layer formed inside the first trench forming a second trench that is embedded in the first trench;
a second insulating layer formed inside the first trench, wherein the first insulating layer formed inside the first trench is formed on the second insulating layer; and
a conducting layer formed on a surface of the first insulating layer away from the substrate and inside the second trench,
wherein a thickness of the first insulating layer formed on the second insulating layer is a first thickness, a thickness of the first insulating layer formed on the surface of the substrate is a second thickness, and a sum of the first thickness and a thickness of the second insulating layer is greater than the second thickness.
2 . The semiconductor device of claim 1 , wherein a surface of the conducting layer away from the second trench is a planar surface.
3 . The semiconductor device of claim 1 , wherein the first insulating layer inside the first trench is formed on a bottom and a sidewall of the first trench.
4 . The semiconductor device of claim 1 , wherein the first insulating layer and the second insulating layer include a same material.
5 . A semiconductor device, comprising:
a substrate including a first portion and multiple separate second portions on the first portion along a vertical direction of the semiconductor device;
a conducting layer formed on the substrate along the vertical direction of the semiconductor device, a part of the conducting layer being formed between two adjacent second portions of the substrate along a horizontal direction of the semiconductor device;
a first insulating layer formed between the substrate and the conducting layer along the vertical direction of the semiconductor device; and
a second insulating layer formed between a bottom of the first insulating layer and the first portion of the substrate,
wherein a thickness of the first insulating layer formed on the second insulating layer is a first thickness, a thickness of the first insulating layer formed on a surface of second portions of the substrate is a second thickness, and a sum of the first thickness and a thickness of the second insulating layer is greater than the second thickness.
6 . The semiconductor device of claim 5 , wherein projections of the part of the conducting layer and the two adjacent second portions overlap to each other along the horizontal direction of the semiconductor device.
7 . The semiconductor device of claim 5 , wherein the first insulating layer is formed on a surface of the first portion and on surfaces and sidewalls of the multiple separate second portions of the substrate.
8 . The semiconductor device of claim 5 ,
wherein the second insulating layer is formed between the substrate and the first insulating layer along the vertical direction of the semiconductor device.
9 . The semiconductor device of claim 5 , wherein a surface of the part of the conducting layer is a planar surface.
10 . The semiconductor device of claim 5 , wherein the first insulating layer and the second insulating layer include a same material.
11 . The semiconductor device of claim 5 , wherein the conducting layer includes polysilicon.
12 . The semiconductor device of claim 5 , wherein the first insulating layer includes silicon oxide.
13 . The semiconductor device of claim 5 , wherein the second insulating layer includes silicon oxide.
14 . The semiconductor device of claim 5 , wherein the substrate includes silicon.
15 . The semiconductor device of claim 1 , wherein the conducting layer includes polysilicon.
16 . The semiconductor device of claim 1 , wherein the first insulating layer includes silicon oxide.
17 . The semiconductor device of claim 1 , wherein the second insulating layer includes silicon oxide.
18 . The semiconductor device of claim 1 , wherein the substrate includes silicon.