Semiconductor structure including Schottky barrier diode and manufacturing method thereof
Provided are a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate including a fin portion, first and second doped regions having a first conductive type, first and second contacts, and first and second metal silicide layers. The fin portion protrudes from a surface of the substrate. The first doped region is disposed in the fin portion. The second doped region is disposed in the fin portion and connected to the first doped region. A doping concentration of the second doped region is greater than that of the first doped region. The first contact is disposed on the first doped region. The second contact is disposed on the second doped region. The first metal silicide layer is disposed between the first contact and the first doped region. The second metal silicide layer is disposed between the second contact and the second doped region.
1 . A semiconductor structure, comprising:
a substrate, including a fin portion protruding from a surface of the substrate;
a first doped region having a first conductive type, disposed in the fin portion;
a second doped region having the first conductive type, disposed in the fin portion and connected to the first doped region, wherein a doping concentration of the second doped region is greater than a doping concentration of the first doped region;
a first contact, disposed on the first doped region;
a second contact, disposed on the second doped region;
a first metal silicide layer, disposed between the first contact and the first doped region and only located at a surface of the first doped region; and
a second metal silicide layer, disposed between the second contact and the second doped region and only located at a surface of the second doped region.
2 . The semiconductor structure of claim 1 , wherein the doping concentration of the first doped region is ranged from 1×10 18 cm −3 to 1×10 19 cm −3 .
3 . The semiconductor structure of claim 1 , wherein the doping concentration of the second doped region is ranged from 1×10 20 cm −3 and 5×10 20 cm −3 .
4 . The semiconductor structure of claim 1 , wherein the fin portion has a second conductive type.
5 . The semiconductor structure of claim 4 , further comprising a third doped region having the first conductive type, disposed below the first doped region, wherein a doping concentration of the third doped region is between the doping concentration of the first doped region and the doping concentration of the second doped region.
6 . The semiconductor structure of claim 5 , wherein the doping concentration of the third doped region is ranged from 1×10 19 cm −3 and 1×10 20 cm −3 .
7 . The semiconductor structure of claim 5 , wherein a depth of the third doped region is smaller than a depth of the second doped region.
8 . The semiconductor structure of claim 1 , wherein the first contact extends into the first doped region.
9 . The semiconductor structure of claim 1 , wherein the first doped region is located throughout the fin portion, and the second doped region is located in the first doped region.
10 . The semiconductor structure of claim 9 , wherein the first contact comprises a first portion and a second portion connected to each other, the first portion is located on a top surface of the fin portion, the second portion extends downward along a sidewall of the fin portion, and the first metal silicide layer is located between the first contact and the top surface and the sidewall of the fin portion.
11 . A manufacturing method of a semiconductor structure, comprising:
providing a substrate comprising a fin portion protruding from a surface of the substrate;
forming a first doped region having a first conductive type in the fin portion;
forming a second doped region having the first conductive type in the fin portion, wherein the second doped region is connected to the first doped region, and a doping concentration of the second doped region is greater than a doping concentration of the first doped region;
forming a first contact on the first doped region;
form a second contact on the second doped region;
forming a first metal silicide layer between the first contact and the first doped region; and
forming a second metal silicide layer between the second contact and the second doped region,
wherein the first metal silicide layer is only located at a surface of the first doped region, and the second metal silicide layer is only located at a surface of the second doped region.
12 . The manufacturing method of claim 11 , wherein the doping concentration of the first doped region is ranged from 1×10 18 cm −3 to 1×10 19 cm −3 .
13 . The manufacturing method of claim 11 , wherein the doping concentration of the second doped region is ranged from 1×10 20 cm −3 to 5×10 20 cm −3 .
14 . The manufacturing method of claim 11 , wherein the fin portion has a second conductive type.
15 . The manufacturing method of claim 14 , further comprising forming a third doped region having the first conductive type below the first doped region, wherein a doping concentration of the third doped region is between the doping concentration of the first doped region and the doping concentration of the second doped region.
16 . The manufacturing method of claim 15 , wherein the doping concentration of the third doped region is ranged from 1×10 19 cm −3 to 1×10 20 cm −3 .
17 . The manufacturing method of claim 15 , wherein a depth of the third doped region is smaller than a depth of the second doped region.
18 . The manufacturing method of claim 11 , wherein the first contact extends into the first doped region.
19 . The manufacturing method of claim 11 , wherein a forming method of the first contact, the second contact, the first metal silicide layer and the second metal silicide layer comprises:
forming a dielectric layer on the substrate, wherein the dielectric layer covers the fin portion;
forming a first contact hole exposing a part of the first doped region in the dielectric layer;
forming a second contact hole exposing a part of the second doped region in the dielectric layer;
forming the first metal silicide layer on the first doped region exposed by the first contact hole;
forming the second metal silicide layer on the second doped region exposed by the second contact hole; and
forming a conductive material on the first metal silicide layer and the second metal silicide layer.
20 . The manufacturing method of claim 11 , wherein the first doped region is formed throughout the fin portion, and the second doped region is formed in the first doped region.
21 . The manufacturing method of claim 20 , wherein the first contact comprises a first portion and a second portion connected to each other, the first portion is located on a top surface of the fin portion, the second portion extends downward along a sidewall of the fin portion, and the first metal silicide layer is formed between the first contact and the top surface and the sidewall of the fin portion.
22 . The manufacturing method of claim 21 , wherein a forming method of the first contact, the second contact, the first metal silicide layer and the second metal silicide layer comprises:
forming a dielectric layer on the substrate, wherein the dielectric layer covers the fin portion;
forming a first contact hole exposing a part of the top surface and a part of the sidewall of the fin portion in the dielectric layer;
forming a second contact hole exposing a part of the second doped region in the dielectric layer;
forming the first metal silicide layer on the fin portion exposed by the first contact hole;
forming the second metal silicide layer on the second doped region exposed by the second contact hole; and
forming a conductive material on the first metal silicide layer and the second metal silicide layer.