IP Library Granted Patent US 12701739
Granted Patent B2
US 12701739 · App. 18/470,120 · Granted Aug 4, 2026

Radiation hardened semiconductor power device

Inventors: Collin William Hitchcock (Clifton Park, NY); Biju Jacob (Niskayuna, NY)
Assignee: GE Aviation Systems LLC
H10D30/64H10D30/028H10D62/105
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Quick Facts
Patent No.
US 12701739
App. No.
18/470,120
Granted
Aug 4, 2026
Kind
B2
Abstract

A radiation hardened semiconductor device including a heavily doped substrate of a semiconductor device, a drift layer having a substantially uniform doping concentration and a thickness is provided. The doping concentration and the thickness of the drift layer are such that when the semiconductor device is operating at a maximum voltage rating, an electrical field profile in the drift layer extends less than 80% of the thickness of the drift layer, providing the radiation hardened nature of the device.

Claims (25)

1 . A semiconductor device comprising:

a heavily doped substrate; and

a drift layer disposed on the heavily doped substrate, the drift layer having a doping concentration and a thickness, wherein the doping concentration is substantially the same for all of the thickness of the drift layer;

wherein the doping concentration and the thickness of the drift layer are such that, when the semiconductor device is operating at a maximum voltage rating, an electrical field profile in the drift layer extends less than 80% of the thickness of the drift layer, wherein the electrical field profile is substantially triangular.

2 . The semiconductor device of claim 1 , wherein when the semiconductor device is operating at the maximum voltage rating, the electrical field profile in the drift layer extends less than 60% of the thickness of the drift layer.

3 . The semiconductor device of claim 1 , wherein when the semiconductor device is operating at the maximum voltage rating, the electrical field profile in the drift layer extends less than 50% of the thickness of the drift layer.

4 . The semiconductor device of claim 1 , wherein when the semiconductor device is operating at the maximum voltage rating, the electrical field profile in the drift layer extends less than 30% of the thickness of the drift layer.

5 . The semiconductor device of claim 1 , wherein when the semiconductor device is operating at the maximum voltage rating, the electrical field profile in the drift layer extends less than 20% of the thickness of the drift layer.

6 . The semiconductor device of claim 1 , wherein when the semiconductor device is operating at the maximum voltage rating, the electrical field profile in the drift layer extends less than 45% of the thickness of the drift layer.

7 . The semiconductor device of claim 1 , wherein the semiconductor device is a unipolar radiation hardened semiconductor device.

8 . The semiconductor device of claim 1 , wherein the semiconductor device is a silicon carbide diode or metal-oxide-semiconductor field-effect transistor (MOSFET).

9 . The semiconductor device of claim 1 , wherein the maximum voltage rating is 1.2 kV.

10 . The semiconductor device of claim 9 , wherein the electrical field profile in the drift layer extends 17 μm into the drift layer at the maximum voltage rating.

11 . The semiconductor device of claim 9 , wherein when the semiconductor device is operating at the maximum voltage rating, the doping concentration of the drift layer is between 6×10 15 cm −3 and 1.5×10 16 cm −3 and the thickness of the drift layer is between 15 μm and 50 μm.

12 . The semiconductor device of claim 1 , wherein the maximum voltage rating is 4.5 kV.

13 . The semiconductor device of claim 12 , wherein the electrical field profile in the drift layer extends 54 μm into the drift layer at the maximum voltage rating.

14 . The semiconductor device of claim 12 , wherein when the semiconductor device is operating at the maximum voltage rating of 4500V, the doping concentration of the drift layer is between 1×10 15 cm −3 and 2×10 15 cm −3 and the thickness of the drift layer is between 50 μm and 200 μm.

15 . A method of forming a semiconductor device of claim 1 , comprising:

selecting a drift layer doping concentration and a drift layer thickness (n) based on reducing an on-state resistivity of a drift layer for the semiconductor device operating at a predetermined operating voltage, the semiconductor device including:

a heavily doped substrate; and

the drift layer disposed on the heavily doped substrate, the drift layer having the drift layer doping concentration and the drift layer thickness;

wherein the doping concentration and the thickness of the drift layer are such that, when the semiconductor device is operating at the predetermined operating voltage, an electrical field profile in the drift layer extends less than 80% of the thickness of the drift layer; and

forming the drift layer having the drift layer doping concentration and the drift layer thickness at least 20% greater than n.

16 . The method of claim 15 , further comprising operating at the predetermined operating voltage, wherein the thickness of the drift layer is at least 40% greater than n μm when the semiconductor device is operating at the predetermined operating voltage.

17 . The method of claim 15 , further comprising operating at the predetermined operating voltage, wherein the thickness of the drift layer is at least 50% greater than n μm when the semiconductor device is operating at the predetermined operating voltage.