Semiconductor device having front side and back side source/drain contacts
A device includes semiconductor device structure includes a first dielectric layer. A first plurality of nanostructures are disposed on the first dielectric layer, with the first plurality of nanostructures overlying one another. A first source/drain region is disposed laterally adjacent to a first side of the first plurality of nanostructures. A second dielectric layer is on a first side of the first source/drain region. A front side source/drain contact is disposed on a second side of the first source/drain region that is opposite the first side, and a backside source/drain contact is disposed on the first side of the first source/drain region. The backside source/drain contact extends through the second dielectric layer.
1 . A semiconductor device, comprising:
a first source/drain region;
a second source/drain region;
a plurality of stacked first nanostructures extending laterally between the first source/drain region and the second source/drain region;
a first dielectric structure below the first nanostructures;
a dielectric liner layer on sidewalls of the first dielectric structure and on a top surface of the first dielectric structure between the first dielectric structure and the first plurality of nanostructures;
a semiconductor structure below the second source/drain region, wherein the dielectric liner layer is positioned between a sidewall of the first dielectric structure and the semiconductor structure;
a dielectric layer on a top surface of the semiconductor structure between the semiconductor structure and the second source/drain region;
a front side source/drain contact above and electrically coupled to the first source/drain region; and
a backside source/drain contact below and electrically coupled to the first source/drain region, the dielectric liner layer positioned between a portion of the first dielectric structure and the backside source/drain contact.
2 . The device of claim 1 ,
wherein the backside source/drain contact has a lower portion and an upper portion, the upper portion disposed between the first source/drain region and the lower portion, and the lower portion has a width that is greater than a width of the upper portion.
3 . The device of claim 2 , wherein the lower portion of the backside source/drain contact is in contact with a backside of the first dielectric structure.
4 . The device of claim 3 , wherein the lower portion of the source/drain contact is in contact with the dielectric liner layer.
5 . The device of claim 2 , wherein the lower portion of the backside source/drain contact includes a first metal, and the upper portion of the backside source/drain contact includes a second metal that is different than the first metal.
6 . The device of claim 2 , wherein the width of the lower portion of the backside source/drain contact is within a range of 5 nm to 30 nm, and the width of the upper portion of the backside source/drain contact is within a range of 10 nm to 60 nm.
7 . The device of claim 2 , wherein each of the lower portion and the upper portion of the backside source/drain has a height within a range of 5 nm to 30 nm.
8 . The device of claim 1 , further comprising a silicide layer between the first source/drain region and the backside source/drain contact.
9 . The device of claim 1 , wherein the dielectric liner layer includes a first side portion in contact with the backside source/drain contact and a second side portion opposite the first side portion, wherein the first side portion has a height that is less than a height of the second side portion.
10 . The device of claim 1 , further comprising a trench isolation structure having a bottom surface at a vertical level lower than a top surface of the backside source/drain contact.
11 . A device, comprising:
a first source/drain region;
a second source/drain region;
a channel region extending laterally between the first source/drain region and the second source/drain region;
a gate electrode at least partially surrounding the channel region;
a semiconductor structure below the second source/drain region;
a dielectric layer between the semiconductor structure and the second source/drain region;
a front side source/drain contact above and electrically coupled to the first source/drain region; and
a backside source/drain contact below and electrically coupled to the first source/drain region and having an upper portion adjacent to the first source/drain region and a lower portion below the upper portion and having a greater width than the upper portion; and
a dielectric structure below the channel and the gate electrode and laterally between the upper portion of the backside source/drain contact and the semiconductor structure, wherein a top surface of the dielectric structure is lower than a top surface of the backside source/drain contact and lower than the dielectric layer.
12 . The device of claim 11 , wherein the lower portion of the backside source/drain contact laterally contacts the dielectric structure.
13 . The device of claim 11 , wherein the upper and lower portions of the backside source/drain contact are formed of different conductive materials.
14 . The device of claim 11 , further comprising a silicide layer between the upper portion of the backside source/drain contact and the first source/drain region.
15 . The device of claim 11 , wherein the channel and the semiconductor structure are different semiconductor materials.
16 . The device of claim 15 , wherein the channel is silicon and the semiconductor structure is silicon germanium.