Semiconductor structure with different distances between gates and source contacts, and method of manufacturing the same

1 . A method of manufacturing a semiconductor structure, comprising:

receiving a first layout, comprising at least a pattern of an active region extending along a first direction;

receiving a second layout comprising a plurality of gate patterns extending along a second direction substantially perpendicular to the first direction, wherein distances between adjacent gate patterns are substantially consistent among the plurality of gate patterns;

overlapping the first layout and the second layout, thereby forming a plurality of transistor patterns;

shifting one of the plurality of gate patterns toward a source of one of the transistor patterns to form a third layout;

forming a first photomask including the third layout, wherein the first photomask includes the plurality of gate patterns, each gate pattern includes a first gate pattern, a second gate pattern, and a third gate pattern disposed between the first gate pattern and the second gate pattern, and the one of the plurality of gate pattern being shifted is the third gate pattern, and a distance between the third gate pattern and the first gate pattern is greater than or less than a distance between the third gate pattern and second gate pattern by a distance in a range of 2 to 6 nanometers; and

transferring the third layout of the photomask to form a plurality of gate structures over a substrate.

2 . The method of claim 1 , wherein the one of the plurality of gate patterns is shifted by a distance in a range of 1 to 3 nanometers.

3 . The method of claim 1 , further comprising:

receiving a fourth layout, including a plurality of contact patterns;

overlapping the fourth layout and the third layout, wherein the plurality of contact patterns and the plurality of gate patterns are alternately arranged;

forming a second photomask including the fourth layout; and

transferring the fourth layout of the second photomask to form a plurality of contact structures over the substrate.

4 . The method of claim 3 , wherein distances between the one of the plurality of gate patterns and two adjacent contact patterns are different during the overlapping of the fourth layout and the third layout.

5 . A method for manufacturing a semiconductor structure, comprising:

forming a gate structure over an active region in a substrate, wherein the gate structure comprises a first portion and a second portion coupled to the first portion, and a distance between a central line of the first portion and a central line of the second portion is greater than 0;

forming a source structure and a drain structure at two opposite sides of the first portion of the gate structure; and

forming a first contact and a second contact electrically connected to the source structure and the drain structure, respectively, wherein a first distance between the first portion of the gate structure and the first contact is different from a second distance between the first portion of the gate structure and the second contact, wherein the forming of the first contact and the second contact further comprises:

forming a dielectric layer over the substrate;

forming an etch stop layer over the dielectric layer and the gate structure; and

forming the first contact and the second contact in the dielectric layer, wherein the first contact and the second contact penetrate the etch stop layer.

6 . The method of claim 5 , wherein a first width of the source structure is substantially less than a second width of the drain structure.

7 . The method of claim 6 , wherein the first width is less than the second width by 2 to 6 nanometers.

8 . The method of claim 5 , wherein the first distance is substantially less than the second distance.

9 . The method of claim 5 , wherein the first contact, the second contact and the gate structure are substantially parallel.

10 . The method of claim 9 , wherein the first contact, the second contact and the gate structure extend in a direction substantially perpendicular to an extending direction of the active region.

11 . The method of claim 5 , wherein a third distance between the gate structure and a first boundary of the active region of the substrate is different from a fourth distance between the gate structure and a second boundary of the active region opposite to the first boundary along an extending direction of the active region.

12 . The method of claim 5 , wherein the gate structure is a sacrificial gate structure, and the method further comprises:

removing a polysilicon material of the sacrificial gate structure; and

depositing a metallic material to form a metal gate structure.

13 . The method of claim 12 , wherein the polysilicon material of the sacrificial gate structure is patterned by extreme ultraviolet (EUV) lithography.

14 . The method of claim 5 , wherein the source structure and the drain structure are formed concurrently by an epitaxial growth.

15 . The method of claim 5 , wherein the active region comprises at least a fin structure.

16 . A method of manufacturing a semiconductor structure, comprising:

receiving a first layout, comprising at least a pattern of an active region extending along a first direction;

receiving a second layout comprising a plurality of gate patterns extending along a second direction substantially perpendicular to the first direction, wherein distances between adjacent gate patterns are substantially consistent among the plurality of gate patterns;

overlapping the first layout and the second layout, thereby forming a plurality of transistor patterns;

shifting one of the plurality of gate patterns toward a source of one of the transistor patterns to form a third layout;

forming a first photomask including the third layout;

transferring the third layout of the photomask to form a plurality of gate structures over a substrate;

receiving a fourth layout, including a plurality of contact patterns;

overlapping the fourth layout and the third layout, wherein the plurality of contact patterns and the plurality of gate patterns are alternately arranged;

forming a second photomask including the fourth layout; and

transferring the fourth layout of the second photomask to form a plurality of contact structures over the substrate, wherein distances between the one of the plurality of gate patterns and two adjacent contact patterns are different during the overlapping of the fourth layout and the third layout.

17 . The method of claim 16 , wherein the one of the plurality of gate patterns is shifted by a distance in a range of 1 to 3 nanometers.

18 . The method of claim 5 , further comprising forming a sidewall spacer over sidewalls of the gate structure.

19 . The method of claim 18 , wherein the sidewall spacer is formed prior to the formation of the source structure and the drain structure.

20 . The method of claim 18 , wherein the sidewall spacer comprises dielectric materials.